The short answer is that yes, the PWM can go a lot faster.It depends on two things: how fast you clock the CTIMER that is generating the PWM, and how many total counts you want in a PWM period. For example, if you clock the CTIMER at 12 MHZ (as fast as it can go), and you set up the PWM to have a 10-bit count, then you will get a 10-bit PWM period of (12,000,000/2**10) or about 11.7 KHz.
Here is some sample code to configure a timer to generate 12-bit PWM on the CLKOUT7 GPIO at nearly 3 KHz:
Code: Select all// Configuring the output is done by specifying the pad number, not which CTn you want.
// This seems less intuitive than specifying a CTn, but that's how it goes.
// Since each CTn maps to a specific pad, there can be no pad confusion.
// We want to drive pad 7 (CLKOUT7) which corresponds to timer output CT19.
// CT19 can be generated via any of the following timer outputs: B4OUT2 A2OUT B4OUT B1OUT2 A6OUT2 A7OUT2
// We will use timer 2A (A2OUT from the list, above):
#define PWMTEST_PAD 7
#define PWMTEST_TIMER_NUM 2
#define PWMTEST_TIMER_SEG AM_HAL_CTIMER_TIMERA
// The PWM period for our 16-bit timer can be anything less than 65536.
// It does not have to be a power of two, either.
// For our test here, we will use a super-smooth 12-bit PWM using a 12 MHz clock
// which yields a PWM rate of 2929 Hz, or nearly 3 KHz.
#define PWM_PERIOD 4096
void test_PWM()
{
// Configure the timer to generate a repeating pulse on the chosen timer output (PWM mode)
am_hal_ctimer_config_single(PWMTEST_TIMER_NUM,
PWMTEST_TIMER_SEG,
AM_HAL_CTIMER_HFRC_12MHZ | AM_HAL_CTIMER_FN_PWM_REPEAT | AM_HAL_CTIMER_PIN_INVERT
);
am_hal_ctimer_output_config(PWMTEST_TIMER_NUM,
PWMTEST_TIMER_SEG,
PWMTEST_PAD,
AM_HAL_CTIMER_OUTPUT_NORMAL,
AM_HAL_GPIO_PIN_DRIVESTRENGTH_4MA
);
// This simple test will drive the PWM signal at 75% high (the first 25% is LOW, then HIGH for the remaining 75%)
am_hal_ctimer_period_set(
PWMTEST_TIMER_NUM, // Which timer to use
PWMTEST_TIMER_SEG, // Which part of the timer to use (A, B, or both)
(PWM_PERIOD)-1, // PWM period length minus 1 (in clocks)
(PWM_PERIOD)/4 // The output will be driven LOW for this many clocks, then HIGH for the remainder of the PWM period
);
// Start generating PWM:
am_hal_ctimer_start(PWMTEST_TIMER_NUM, PWMTEST_TIMER_SEG);
}
Here is a scope shot showing the PWM output from the test, above. The scope measures the period at 2.924 KHz with a 75% duty cycle, as expected.
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