SparkFun Forums

[mohamedali1993]

Hello, I am doing a project where I am connecting a photto-interrupter signal to a debounce circuit, and tying the debounce circuit output to the tiny RST on the ESP8266 Thing (not the DTR pin and not the RST pin on the ESP8266 Developer board). I am using this pin because I want to bypass the 0.1 micro-farade capacitor on purpose, I don't know what purpose does it serve (please explain if you're aware). There are no information about the RST pin in the ESP8266 hookup guide, however, ESP8266 Developer board hookup guide states that there is a 10K ohm pull up resistor, so I am assuming something similar with the regular ESP8266.

My questions are:
How does that pull up resistor work with the processor's RST? Does the processor reboot on the low edge? or low itself? and if so for how many milli-seconds does it need to be low for? I also noticed the phant posting or the rest of the script itself doesn't execute if the RST stays at low, is this true for others (it would make sense becuase of the pull up resistor)? or is it the positive edge itself that is suppose to get the rest of the code working?

Thanks for any help that you guys can provide me with!
Please let me know if I need to clarify any of my question/project setup,
MO

[Valen]

The pull-up resistor keeps the RST pin at a high level if no other voltage is applied to it. If the supply voltage glitches down it needs to be reset to assure correct internal state. I don't know the specifics of the ESP8266, but commonly the reset condition activates when the pin goes below a certain voltage level. And doesn't reboot until it comes above a certain (higher) hysteresis threshold. How much that is should be in the datasheet. It's been a while since I read it though.

The 0.1 microfarad capacitor function is to pull the reset pin down along with the DTR pin swinging from high to low. It first charges up to whatever is the difference between Vcc and DTR. Either through R6 and also through D5 and R15 if the jumper connections are closed. If DTR happens to be low and C6 starts off discharged or with negative voltage, it could temporarily keep the 8266 in reset until it charges up and RST goes up to above the threshold. If DTR goes high then RST gets pushed to a higher level than Vcc because the voltage across the capacitor gets added to DTR. This will quickly bleed of to Vcc through clamping diodes in the 8266 discharging the voltage across the capacitor to 0 volts. Only when DTR goes now from high to low will it cause the true reset, as the now 0-volts capacitor pulls the RST voltage back to it's low level with it. And then the capacitor slowly charges up again though the pullups R6 (and maybe D5 and R15). It does not matter if DTR is kept low after this. Reset recovery occurs anyway as RST climbs again.

[mohamedali1993]

Valen, thank you so much! How did you know all of this? I tried searching vigorously for your explanation but with no luck. Did you just look at the eagle schematic and interpreted the circuitry or is there some secret up your sleeve?

[Valen]

Yeah, just that. Interpreting the schematic.