- Mon Dec 24, 2012 7:01 am
#153523
Hi, this is only my third Eagle hobby project. I am learning a lot but I just hit the buffers!
When I look at my Eagle libray components I can see that some have pins defined as VSS and sometime as GND. Similar is true with VCC +5V etc. I cannot assume that all library components will use consistent pin naming
Once the devices are placed on the schematic I want all device pins defined as VSS and GND to be regarded as equal but since they have different NET names they cannot be treated the same. I also discovered that when Eagle throws up a NET error on the schematic, it will not even draw the ratsnest, so there is a big pitfall if you ignore the error. I have learned how to do the 'ground pour' and I think I need to get this conflict sorted out, otherwise I will get unpredictable results.
My question is how can I treat VSS and GND pins used on different components the same in my schematic. I do not want to start creating custom library parts to make the pin designations the same, so they will be on the same net. Is there a way of parsing the active USE library for my project to make all the VSS or GND pins the same before I drop components on the schematic? I read about using 'shorts', is this the only solution? Or is there a utility that will show me all the nets in my project and allow me to rename the VCC nets as all GND?
Sorry if I my question sounds clumsy, but I am freaked out trying to get an error free schematic at the moment.
Merry Christmas to all.
When I look at my Eagle libray components I can see that some have pins defined as VSS and sometime as GND. Similar is true with VCC +5V etc. I cannot assume that all library components will use consistent pin naming
Once the devices are placed on the schematic I want all device pins defined as VSS and GND to be regarded as equal but since they have different NET names they cannot be treated the same. I also discovered that when Eagle throws up a NET error on the schematic, it will not even draw the ratsnest, so there is a big pitfall if you ignore the error. I have learned how to do the 'ground pour' and I think I need to get this conflict sorted out, otherwise I will get unpredictable results.
My question is how can I treat VSS and GND pins used on different components the same in my schematic. I do not want to start creating custom library parts to make the pin designations the same, so they will be on the same net. Is there a way of parsing the active USE library for my project to make all the VSS or GND pins the same before I drop components on the schematic? I read about using 'shorts', is this the only solution? Or is there a utility that will show me all the nets in my project and allow me to rename the VCC nets as all GND?
Sorry if I my question sounds clumsy, but I am freaked out trying to get an error free schematic at the moment.
Merry Christmas to all.