SparkFun Forums

[tomts]

Hello All -
The RedBoard Artemis ATP example RTC/Example6_LowPower_Alarm works brilliantly, without modification, waking up every minute and printing out a message with the time. But when ArudinoBLE.h is included with BLE.begin() in the setup routine, the processor fails to go into sleep mode and prints out its message every second or so. Adding BLE.end() right below the begin statement doesn't solve the problem. This was noted previously (#227036), but there was no reply. Is there a way around this problem?

[TS-Russell]

The issue here https://github.com/sparkfun/Arduino_Apo ... 1182658804 has a solution that worked when I just tested it; I believe you probably just need to add a bool flag up top like they did

[tomts]

That worked perfectly! In all my searching, I failed to find that solution. Many Thanks!

[williamwoodruff05]

Thank you, Russell; your answer was really helpful.

[tomts]

I’m trying to incorporate an Artemis Module into an application where there are hourly sensor measurements, followed by a quick beacon broadcast and deep sleep for an hour before the next measurement. The PCB will be difficult to access, so battery life is critical. I’ve hit three problems when ArduinoBLE and deepsleep are combined. I’m hoping someone will be able to help. Here they are.
The first is the one discussed above. Timer 7 is started with BLE.begin() and is not turned off by BLE.end(). Leaving the timer running keeps the processor from entering deep sleep. My application doesn’t need the timer and I turn it off immediately after BLE.start() with CTIMER->CTRL7 = 0. Easy enough.
The second is that cycling BLE.begin() and BLE.end() more than 25 times results in a hard fault. This problem has been reported before and was fixed, but it seems to still exist for Artemis. I couldn’t find a direct solution and only managed to circumvent it by rebooting every 20 cycles with RSTGEN->SWPOR = 0xD4. Not the best solution, but it is now moot due to the third problem.
The third problem is the one causing the most angst. While the above two remedies gave me functioning code, when I checked the power profile, the base current in deep sleep was way too high at 80 uA (compared to its usual ~2.5 uA when not using BLE). Contrary to my assumption, BLE.end() does not turn the BLE power off. I tried turning it off using PWRCTRL->DEVPWREN_b.PWRBLEL = 0, but then the next call to BLE.begin() either results in a hard fault (if BLE power is not restored at wake-up), or no BLE functionality (if power is restored). BLE.begin() functions differently the second time it is called. I can’t trace the code – I lose it at HCITransport.h, since there is no HCItransport.cpp. If I stick with ArduinoBLE, the only solution I’ve been able to come up with is to reboot immediately after waking up. This is the solution that I’m pursuing, but it means more power consumption that I’d rather avoid. Is there a better solution?

[paulvha]

let me try answer the 3 issues as I have spend a lot of time on BLE and DeepDive
1. The timer.
With the Artemis BLE driver implementation, it is indeed not needed. There are NO timers enabled in the BLE driver, BUT there COULD be. There is a wakeuptimer and a HeartBeatTimer defined which are currently disabled. They can be used to improve stability and workflow and you never know whether in the future these will be enabled. Thus to keep it safe I would disable the timer after BLE.end() with 'am_hal_ctimer_stop(7, AM_HAL_CTIMER_TIMERB)'

2. Crash after 25 times deep sleep.
Every time BLE starts in the routine AP3CordioHCITransportDriver.cpp (part of MBED target) it will request a new "handle" for WSF. WSF functions are used for passing the request and information in an organized manner between the different sub-routines in the BLE driver. A 'handle' is used to connect the functions. The root cause is that there is NO function call in WSF for BLE.end() to 'free' an earlier obtained 'handle' and as there are maximum 16 handles available, it will run out. The crash is after 25 times (hard re- producible) as it then starts to overwrite parts of other variables which causes the crash. Personally, I made a change to that file to only obtain a handle if it does not have one and rebuild the MBED pre-compiled archive for each board. No issues since !!

3. power consumption
For sure BLE.end() also results in a power-off BLE component in the Artemis, the HAL-driver will wait until that power-off is confirmed !. I think your issues are related to the other peripherals (IOM, ADC, UART, PWM etc). There are major issues with powering those down and crashing when you startup again. The Sparkfun Libraries (V1 and V2), as they are, do not handle deep sleep well.
Look at a deep-dive document I have done to describe deep sleep. It is working a little differently than the Sparkfun example is showing.(https://github.com/paulvha/apollo3/tree ... PowerCntrl)
To overcome I had to make changes to Wire,SPI, PWM, UART in the libraries, the MBED drivers and Mbed Apollo3 target files.

With all those changes I build different BLE implementations that work with SPS30 (Wire), BME280 (communicating in SPI or WIRE) that work with deep sleep without problems.

I am still in the process to document... but other projects got in between. :-)

[tomts]

Wow. That is exactly the response I need. You've given me a lot to digest. Regarding point 3 - the github link looks extremely useful. I looked at BLE.end() and its effect on the registers for several days. I couldn't find a single change in any meaningful register. I will look again. Maybe I need a delay() between BLE.end() and reading the registers. I'll either figure it out or post some code that you can rip apart. Thank you.

[tomts]

I can't get BLE.end() to shut down the BLE power. I tried putting in a 60 second delay between BLE.end() and checking registers and then going into deep sleep. Same results - BLE power on and sleep current at 80 uA. Then I tried the following code, which also left the power running following the delay (DEVPWREN = 0x2080, where the 2 is bit 13, BLEL). Could I have a bad copy of ArduinoBLE or am I doing something obviously wrong?
Here is the code:

Code: Select all

#include "ArduinoBLE.h"

uint32_t regReading[2][400];
String regNames[400];
uint32_t tempReg0;
uint32_t tempReg1;
uint32_t* regVal;

void setup() {  
  Serial.begin(115200);
 
  loadRegNames();

  BLE.begin();
  delay(2000);

  readRegs(0);
  
  BLE.end();
  am_hal_ctimer_stop(7, AM_HAL_CTIMER_TIMERB);
  delay(60'000);
 
  readRegs(1);

  Serial.println("\n");

  for (int i = 0; i < 320; i++) {
    Serial.print(regNames[i]);
    //Serial.print(',');
    for (int j = 0; j < (31 - regNames[i].length()) / 8; j++) Serial.print("\t");
    Serial.print("\t");
    Serial.print(regReading[0][i], HEX);
    //Serial.print(',');
    Serial.print("\t");
    if (regReading[0][i] < 0x10000000) Serial.print("\t");
    Serial.print(regReading[1][i], HEX);
    //Serial.print(',');
    Serial.print("\t");
    if (regReading[1][i] < 0x10000000) Serial.print("\t");
    if (regReading[0][i] != regReading[1][i]) Serial.print("CHANGE");
    Serial.println();
  }
}

//========================================================
void loop() {
}


//-----------------------------------------------------------
void readRegs(int idx) {
  tempReg0 = MCUCTRL->FEATUREENABLE;
  MCUCTRL->FEATUREENABLE_b.BLEREQ = 1; 
  delay(2);
  tempReg1 = PWRCTRL->DEVPWREN;
  PWRCTRL->DEVPWREN_b.PWRBLEL = 1;
  delay(2);
  regReading[idx][0] = BLEIF->FIFO;
  regReading[idx][1] = BLEIF->FIFOPTR;
  regReading[idx][2] = BLEIF->FIFOTHR;
  regReading[idx][3] = BLEIF->FIFOPOP;
  regReading[idx][4] = BLEIF->FIFOPUSH;
  regReading[idx][5] = BLEIF->FIFOCTRL;
  regReading[idx][6] = BLEIF->FIFOLOC;
  regReading[idx][7] = BLEIF->CLKCFG;
  regReading[idx][8] = BLEIF->CMD;
  regReading[idx][9] = BLEIF->CMDRPT;
  regReading[idx][10] = BLEIF->OFFSETHI;
  regReading[idx][11] = BLEIF->CMDSTAT;
  regReading[idx][12] = BLEIF->INTEN;
  regReading[idx][13] = BLEIF->INTSTAT;
  regReading[idx][14] = BLEIF->INTCLR;
  regReading[idx][15] = BLEIF->INTSET ;
  regReading[idx][15] = BLEIF->DMATRIGEN;
  regReading[idx][16] = BLEIF->DMATRIGSTAT;
  regReading[idx][17] = BLEIF->DMACFG;
  regReading[idx][18] = BLEIF->DMATOTCOUNT;
  regReading[idx][19] = BLEIF->DMATARGADDR ;
  regReading[idx][20] = BLEIF->DMASTAT;
  regReading[idx][21] = BLEIF->CQCFG;
  regReading[idx][22] = BLEIF->CQADDR;
  regReading[idx][23] = BLEIF->CQSTAT;
  regReading[idx][24] = BLEIF->CQFLAGS;
  regReading[idx][25] = BLEIF->CQSETCLEAR;
  regReading[idx][26] = BLEIF->CQPAUSEEN;
  regReading[idx][27] = BLEIF->CQCURIDX;
  regReading[idx][28] = BLEIF->CQENDIDX;
  regReading[idx][29] = BLEIF->STATUS;
  regReading[idx][30] = BLEIF->MSPICFG;
  regReading[idx][31] = BLEIF->BLECFG;
  PWRCTRL->DEVPWREN = tempReg1;
  MCUCTRL->FEATUREENABLE = tempReg0; 

  regReading[idx][32] = PWRCTRL->SUPPLYSRC;
  regReading[idx][33] = PWRCTRL->SUPPLYSTATUS;
  regReading[idx][34] = PWRCTRL->DEVPWREN;
  regReading[idx][35] = PWRCTRL->MEMPWDINSLEEP;
  regReading[idx][36] = PWRCTRL->MEMPWREN;
  regReading[idx][37] = PWRCTRL->MEMPWRSTATUS;
  regReading[idx][38] = PWRCTRL->DEVPWRSTATUS;
  regReading[idx][39] = PWRCTRL->SRAMCTRL;
  regReading[idx][40] = PWRCTRL->ADCSTATUS;
  regReading[idx][41] = PWRCTRL->MISC;
  regReading[idx][42] = PWRCTRL->DEVPWREVENTEN;
  regReading[idx][43] = PWRCTRL->MEMPWREVENTEN;

  regReading[idx][44] = MCUCTRL->CHIPPN;
  regReading[idx][45] = MCUCTRL->CHIPID0;
  regReading[idx][46] = MCUCTRL->CHIPID1;
  regReading[idx][47] = MCUCTRL->CHIPREV;
  regReading[idx][48] = MCUCTRL->VENDORID;
  regReading[idx][49] = MCUCTRL->SKU;
  regReading[idx][50] = MCUCTRL->FEATUREENABLE;
  regReading[idx][51] = MCUCTRL->DEBUGGER;
  regReading[idx][52] = MCUCTRL->ADCPWRDLY;
  regReading[idx][53] = MCUCTRL->ADCCAL;
  regReading[idx][54] = MCUCTRL->ADCBATTLOAD;
  regReading[idx][55] = MCUCTRL->ADCTRIM;
  regReading[idx][56] = MCUCTRL->ADCREFCOMP;
  regReading[idx][57] = MCUCTRL->ADCREFCOMP;
  regReading[idx][58] = MCUCTRL->XTALCTRL;
  regReading[idx][59] = MCUCTRL->XTALGENCTRL;
  regReading[idx][60] = MCUCTRL->MISCCTRL;
  regReading[idx][61] = MCUCTRL->BOOTLOADER ;
  regReading[idx][62] = MCUCTRL->SHADOWVALID;
  regReading[idx][63] = MCUCTRL->SCRATCH0;
  regReading[idx][64] = MCUCTRL->SCRATCH1;
  regReading[idx][65] = MCUCTRL->ICODEFAULTADDR;
  regReading[idx][66] = MCUCTRL->DCODEFAULTADDR;
  regReading[idx][67] = MCUCTRL->SYSFAULTADDR;
  regReading[idx][68] = MCUCTRL->FAULTSTATUS;
  regReading[idx][69] = MCUCTRL->FAULTCAPTUREEN;
  regReading[idx][70] = MCUCTRL->DBGR1;
  regReading[idx][71] = MCUCTRL->DBGR2;
  regReading[idx][72] = MCUCTRL->PMUENABLE;
  regReading[idx][73] = MCUCTRL->TPIUCTRL;
  regReading[idx][74] = MCUCTRL->OTAPOINTER;
  regReading[idx][75] = MCUCTRL->SRAMMODE;
  regReading[idx][76] = MCUCTRL->KEXTCLKSEL;
  regReading[idx][77] = MCUCTRL->SIMOBUCK3 ;
  regReading[idx][78] = MCUCTRL->SIMOBUCK4;
  regReading[idx][79] = MCUCTRL->BLEBUCK2;
  regReading[idx][80] = MCUCTRL->FLASHWPROT0;
  regReading[idx][81] = MCUCTRL->FLASHWPROT1;
  regReading[idx][82] = MCUCTRL->FLASHRPROT0;
  regReading[idx][83] = MCUCTRL->FLASHRPROT1;
  regReading[idx][84] = MCUCTRL->DMASRAMWRITEPROTECT0;
  regReading[idx][85] = MCUCTRL->DMASRAMWRITEPROTECT1;
  regReading[idx][86] = MCUCTRL->DMASRAMREADPROTECT0;
  regReading[idx][87] = MCUCTRL->DMASRAMREADPROTECT1;

  regReading[idx][88] = CACHECTRL->CACHECFG ;
  regReading[idx][89] = CACHECTRL->FLASHCFG;
  regReading[idx][90] = CACHECTRL->CTRL;
  regReading[idx][91] = CACHECTRL->NCR0START;
  regReading[idx][92] = CACHECTRL->NCR0END;
  regReading[idx][93] = CACHECTRL->NCR1START;
  regReading[idx][94] = CACHECTRL->NCR1END;
  regReading[idx][95] = CACHECTRL->DMON0;
  regReading[idx][96] = CACHECTRL->DMON1;
  regReading[idx][97] = CACHECTRL->DMON2;
  regReading[idx][98] = CACHECTRL->DMON3;
  regReading[idx][99] = CACHECTRL->IMON0;
  regReading[idx][100] = CACHECTRL->IMON1;
  regReading[idx][101] = CACHECTRL->IMON2;
  regReading[idx][102] = CACHECTRL->IMON3;

  tempReg0 = PWRCTRL->DEVPWREN;
  PWRCTRL->DEVPWREN_b.PWRMSPI = 1;
  delay(2);
  regReading[idx][103] = MSPI->CTRL;
  regReading[idx][104] = MSPI->CFG;
  regReading[idx][105] = MSPI->ADDR;
  regReading[idx][106] = MSPI->INSTR;
  regReading[idx][107] = MSPI->TXFIFO;
  regReading[idx][108] = MSPI->RXFIFO;
  regReading[idx][109] = MSPI->TXENTRIES;
  regReading[idx][110] = MSPI->RXENTRIES;
  regReading[idx][111] = MSPI->THRESHOLD;
  regReading[idx][112] = MSPI->MSPICFG;
  regReading[idx][113] = MSPI->PADCFG;
  regReading[idx][114] = MSPI->PADOUTEN;
  regReading[idx][115] = MSPI->FLASH;
  regReading[idx][116] = MSPI->SCRAMBLING;
  regReading[idx][117] = MSPI->INTEN;
  regReading[idx][118] = MSPI->INTSTAT;
  regReading[idx][119] = MSPI->INTCLR;
  regReading[idx][120] = MSPI->INTSET;
  regReading[idx][121] = MSPI->DMACFG;
  regReading[idx][122] = MSPI->DMASTAT;
  regReading[idx][123] = MSPI->DMATARGADDR;
  regReading[idx][124] = MSPI->DMADEVADDR;
  regReading[idx][125] = MSPI->DMATOTCOUNT;
  regReading[idx][126] = MSPI->DMABCOUNT;
  regReading[idx][127] = MSPI->DMATHRESH;
  regReading[idx][128] = MSPI->CQCFG;
  regReading[idx][129] = MSPI->CQADDR;
  regReading[idx][130] = MSPI->CQSTAT;
  regReading[idx][131] = MSPI->CQFLAGS;
  regReading[idx][132] = MSPI->CQSETCLEAR;
  regReading[idx][133] = MSPI->CQPAUSE;
  regReading[idx][134] = MSPI->CQCURIDX;
  regReading[idx][135] = MSPI->CQENDIDX;
  PWRCTRL->DEVPWREN = tempReg0;

  regReading[idx][136] = CLKGEN->CALXT;
  regReading[idx][137] = CLKGEN->CALRC;
  regReading[idx][138] = CLKGEN->ACALCTR;
  regReading[idx][139] = CLKGEN->OCTRL;
  regReading[idx][140] = CLKGEN->CLKOUT;
  regReading[idx][141] = CLKGEN->CLKKEY;
  regReading[idx][142] = CLKGEN->CCTRL;
  regReading[idx][143] = CLKGEN->STATUS;
  regReading[idx][144] = CLKGEN->HFADJ;
  regReading[idx][145] = CLKGEN->CLOCKENSTAT;
  regReading[idx][146] = CLKGEN->CLOCKEN2STAT;
  regReading[idx][147] = CLKGEN->CLOCKEN3STAT;
  regReading[idx][148] = CLKGEN->FREQCTRL;
  regReading[idx][149] = CLKGEN->BLEBUCKTONADJ;
  regReading[idx][150] = CLKGEN->INTRPTEN;
  regReading[idx][151] = CLKGEN->INTRPTSTAT;
  regReading[idx][152] = CLKGEN->INTRPTCLR;
  regReading[idx][153] = CLKGEN->INTRPTSET;

  regReading[idx][154] = RTC->CTRLOW;
  regReading[idx][155] = RTC->CTRUP;
  regReading[idx][156] = RTC->ALMLOW;
  regReading[idx][157] = RTC->ALMUP;
  regReading[idx][158] = RTC->RTCCTL;
  regReading[idx][159] = RTC->INTEN;
  regReading[idx][160] = RTC->INTSTAT;
  regReading[idx][161] = RTC->INTCLR;
  regReading[idx][162] = RTC->INTSET;

  tempReg0 = PWRCTRL->DEVPWREN;
  PWRCTRL->DEVPWREN_b.PWRADC = 1;
  delay(2);
  regReading[idx][163] = ADC->CFG ;
  regReading[idx][164] = ADC->STAT;
  regReading[idx][165] = ADC->SWT;
  regReading[idx][166] = ADC->SL0CFG;
  regReading[idx][167] = ADC->SL1CFG;
  regReading[idx][168] = ADC->SL2CFG;
  regReading[idx][168] = ADC->SL3CFG;
  regReading[idx][169] = ADC->SL4CFG;
  regReading[idx][170] = ADC->SL5CFG;
  regReading[idx][171] = ADC->SL6CFG;
  regReading[idx][172] = ADC->SL7CFG;
  regReading[idx][173] = ADC->WULIM;
  regReading[idx][174] = ADC->WLLIM;
  regReading[idx][175] = ADC->SCWLIM;
  regReading[idx][175] = ADC->FIFO;
  regReading[idx][176] = ADC->FIFOPR;
  regReading[idx][177] = ADC->INTEN;
  regReading[idx][178] = ADC->INTSTAT;
  regReading[idx][179] = ADC->INTCLR;
  regReading[idx][180] = ADC->INTSET;
  regReading[idx][181] = ADC->DMATRIGEN;
  regReading[idx][182] = ADC->DMATRIGSTAT;
  regReading[idx][183] = ADC->DMACFG;
  regReading[idx][184] = ADC->DMATOTCOUNT;
  regReading[idx][185] = ADC->DMATARGADDR;
  regReading[idx][186] = ADC->DMASTAT;
  PWRCTRL->DEVPWREN = tempReg0;

  regReading[idx][187] = GPIO->PADREGA;
  regReading[idx][188] = GPIO->PADREGB;
  regReading[idx][189] = GPIO->PADREGC;
  regReading[idx][190] = GPIO->PADREGD;
  regReading[idx][191] = GPIO->PADREGE;
  regReading[idx][192] = GPIO->PADREGF;
  regReading[idx][193] = GPIO->PADREGG;
  regReading[idx][194] = GPIO->PADREGH;
  regReading[idx][195] = GPIO->PADREGI;
  regReading[idx][196] = GPIO->PADREGJ;
  regReading[idx][197] = GPIO->PADREGK;
  regReading[idx][198] = GPIO->PADREGL;
  regReading[idx][199] = GPIO->PADREGM;
  regReading[idx][200] = GPIO->CFGA;
  regReading[idx][201] = GPIO->CFGB;
  regReading[idx][202] = GPIO->CFGC;
  regReading[idx][203] = GPIO->CFGD;
  regReading[idx][204] = GPIO->CFGE;
  regReading[idx][205] = GPIO->CFGF;
  regReading[idx][206] = GPIO->CFGG;
  regReading[idx][207] = GPIO->PADKEY;
  regReading[idx][208] = GPIO->RDA;
  regReading[idx][209] = GPIO->RDB;
  regReading[idx][210] = GPIO->WTA;
  regReading[idx][211] = GPIO->WTB;
  regReading[idx][212] = GPIO->WTSA;
  regReading[idx][213] = GPIO->WTSB;
  regReading[idx][214] = GPIO->WTCA;
  regReading[idx][215] = GPIO->WTCB;
  regReading[idx][216] = GPIO->ENA;
  regReading[idx][217] = GPIO->ENB;
  regReading[idx][218] = GPIO->ENSA;
  regReading[idx][219] = GPIO->ENSB;
  regReading[idx][220] = GPIO->ENCA;
  regReading[idx][221] = GPIO->ENCB;
  regReading[idx][222] = GPIO->STMRCAP;
  regReading[idx][223] = GPIO->IOM0IRQ;
  regReading[idx][224] = GPIO->IOM1IRQ;
  regReading[idx][225] = GPIO->IOM2IRQ;
  regReading[idx][226] = GPIO->IOM3IRQ;
  regReading[idx][227] = GPIO->IOM4IRQ;
  regReading[idx][228] = GPIO->IOM5IRQ;
  regReading[idx][229] = GPIO->BLEIFIRQ;
  regReading[idx][230] = GPIO->GPIOOBS;
  regReading[idx][231] = GPIO->ALTPADCFGA;
  regReading[idx][232] = GPIO->ALTPADCFGB;
  regReading[idx][233] = GPIO->ALTPADCFGC;
  regReading[idx][234] = GPIO->ALTPADCFGD;
  regReading[idx][235] = GPIO->ALTPADCFGE;
  regReading[idx][236] = GPIO->ALTPADCFGF;
  regReading[idx][237] = GPIO->ALTPADCFGG;
  regReading[idx][238] = GPIO->ALTPADCFGH;
  regReading[idx][239] = GPIO->ALTPADCFGI;
  regReading[idx][240] = GPIO->ALTPADCFGJ;
  regReading[idx][241] = GPIO->ALTPADCFGK;
  regReading[idx][242] = GPIO->ALTPADCFGL;
  regReading[idx][243] = GPIO->ALTPADCFGM;
  regReading[idx][244] = GPIO->SCDET;
  regReading[idx][245] = GPIO->CTENCFG;
  regReading[idx][246] = GPIO->INT0EN;
  regReading[idx][247] = GPIO->INT0STAT;
  regReading[idx][248] = GPIO->INT0CLR;
  regReading[idx][249] = GPIO->INT0SET;
  regReading[idx][250] = GPIO->INT1EN;
  regReading[idx][251] = GPIO->INT1STAT;
  regReading[idx][252] = GPIO->INT1CLR;
  regReading[idx][253] = GPIO->INT1SET;

  regReading[idx][254] = CTIMER->TMR0;
  regReading[idx][255] = CTIMER->CMPRA0;
  regReading[idx][256] = CTIMER->CMPRB0;
  regReading[idx][257] = CTIMER->CTRL0;
  regReading[idx][258] = CTIMER->CMPRAUXA0;
  regReading[idx][259] = CTIMER->CMPRAUXB0;
  regReading[idx][260] = CTIMER->AUX0;
  regReading[idx][261] = CTIMER->TMR1;
  regReading[idx][262] = CTIMER->CMPRA1;
  regReading[idx][263] = CTIMER->CMPRB1;
  regReading[idx][264] = CTIMER->CTRL1;
  regReading[idx][265] = CTIMER->CMPRAUXA1;
  regReading[idx][266] = CTIMER->CMPRAUXB1;
  regReading[idx][267] = CTIMER->AUX1;
  regReading[idx][268] = CTIMER->TMR2;
  regReading[idx][269] = CTIMER->CMPRA2;
  regReading[idx][270] = CTIMER->CMPRB2;
  regReading[idx][271] = CTIMER->CTRL2;
  regReading[idx][272] = CTIMER->CMPRAUXA2;
  regReading[idx][273] = CTIMER->CMPRAUXB2;
  regReading[idx][274] = CTIMER->AUX2;
  regReading[idx][275] = CTIMER->TMR3;
  regReading[idx][276] = CTIMER->CMPRA3;
  regReading[idx][277] = CTIMER->CMPRB3;
  regReading[idx][278] = CTIMER->CTRL3;
  regReading[idx][279] = CTIMER->CMPRAUXA3;
  regReading[idx][280] = CTIMER->CMPRAUXB3;
  regReading[idx][281] = CTIMER->AUX3;
  regReading[idx][282] = CTIMER->TMR4;
  regReading[idx][283] = CTIMER->CMPRA4;
  regReading[idx][284] = CTIMER->CMPRB4;
  regReading[idx][285] = CTIMER->CTRL4;
  regReading[idx][286] = CTIMER->CMPRAUXA4;
  regReading[idx][287] = CTIMER->CMPRAUXB4;
  regReading[idx][288] = CTIMER->AUX4;
  regReading[idx][289] = CTIMER->TMR5;
  regReading[idx][290] = CTIMER->CMPRA5;
  regReading[idx][291] = CTIMER->CMPRB5;
  regReading[idx][292] = CTIMER->CTRL5;
  regReading[idx][293] = CTIMER->CMPRAUXA5;
  regReading[idx][294] = CTIMER->CMPRAUXB5;
  regReading[idx][295] = CTIMER->AUX5;
  regReading[idx][296] = CTIMER->TMR6;
  regReading[idx][297] = CTIMER->CMPRA6;
  regReading[idx][298] = CTIMER->CMPRB6;
  regReading[idx][299] = CTIMER->CTRL6;
  regReading[idx][300] = CTIMER->CMPRAUXA6;
  regReading[idx][301] = CTIMER->CMPRAUXB6;
  regReading[idx][302] = CTIMER->AUX6;
  regReading[idx][303] = CTIMER->TMR7;
  regReading[idx][304] = CTIMER->CMPRA7;
  regReading[idx][305] = CTIMER->CMPRB7;
  regReading[idx][306] = CTIMER->CTRL7;
  regReading[idx][307] = CTIMER->CMPRAUXA7;
  regReading[idx][308] = CTIMER->CMPRAUXB7;
  regReading[idx][309] = CTIMER->AUX7;
  regReading[idx][310] = CTIMER->GLOBEN;
  regReading[idx][311] = CTIMER->OUTCFG0;
  regReading[idx][312] = CTIMER->OUTCFG1;
  regReading[idx][313] = CTIMER->OUTCFG2;
  regReading[idx][314] = CTIMER->OUTCFG3;
  regReading[idx][315] = CTIMER->INCFG;
  regReading[idx][316] = CTIMER->INTEN;
  regReading[idx][317] = CTIMER->INTSTAT;
  regReading[idx][318] = CTIMER->INTCLR;
  regReading[idx][319] = CTIMER->INTSET;
}


void loadRegNames() {
  regNames[0] = "BLEIF->FIFO";
  regNames[1] = "BLEIF->FIFOPTR";
  regNames[2] = "BLEIF->FIFOTHR";
  regNames[3] = "BLEIF->FIFOPOP";
  regNames[4] = "BLEIF->FIFOPUSH";
  regNames[5] = "BLEIF->FIFOCTRL";
  regNames[6] = "BLEIF->FIFOLOC";
  regNames[7] = "BLEIF->CLKCFG";
  regNames[8] = "BLEIF->CMD";
  regNames[9] = "BLEIF->CMDRPT";
  regNames[10] = "BLEIF->OFFSETHI";
  regNames[11] = "BLEIF->CMDSTAT";
  regNames[12] = "BLEIF->INTEN";
  regNames[13] = "BLEIF->INTSTAT";
  regNames[14] = "BLEIF->INTCLR";
  regNames[15] = "BLEIF->INTSET ";
  regNames[15] = "BLEIF->DMATRIGEN";
  regNames[16] = "BLEIF->DMATRIGSTAT";
  regNames[17] = "BLEIF->DMACFG";
  regNames[18] = "BLEIF->DMATOTCOUNT";
  regNames[19] = "BLEIF->DMATARGADDR ";
  regNames[20] = "BLEIF->DMASTAT";
  regNames[21] = "BLEIF->CQCFG";
  regNames[22] = "BLEIF->CQADDR";
  regNames[23] = "BLEIF->CQSTAT";
  regNames[24] = "BLEIF->CQFLAGS";
  regNames[25] = "BLEIF->CQSETCLEAR";
  regNames[26] = "BLEIF->CQPAUSEEN";
  regNames[27] = "BLEIF->CQCURIDX";
  regNames[28] = "BLEIF->CQENDIDX";
  regNames[29] = "BLEIF->STATUS";
  regNames[30] = "BLEIF->MSPICFG";
  regNames[31] = "BLEIF->BLECFG";
  regNames[32] = "PWRCTRL->SUPPLYSRC";
  regNames[33] = "PWRCTRL->SUPPLYSTATUS";
  regNames[34] = "PWRCTRL->DEVPWREN";
  regNames[35] = "PWRCTRL->MEMPWDINSLEEP";
  regNames[36] = "PWRCTRL->MEMPWREN";
  regNames[37] = "PWRCTRL->MEMPWRSTATUS";
  regNames[38] = "PWRCTRL->DEVPWRSTATUS";
  regNames[39] = "PWRCTRL->SRAMCTRL";
  regNames[40] = "PWRCTRL->ADCSTATUS";
  regNames[41] = "PWRCTRL->MISC";
  regNames[42] = "PWRCTRL->DEVPWREVENTEN";
  regNames[43] = "PWRCTRL->MEMPWREVENTEN";
  regNames[44] = "MCUCTRL->CHIPPN";
  regNames[45] = "MCUCTRL->CHIPID0";
  regNames[46] = "MCUCTRL->CHIPID1";
  regNames[47] = "MCUCTRL->CHIPREV";
  regNames[48] = "MCUCTRL->VENDORID";
  regNames[49] = "MCUCTRL->SKU";
  regNames[50] = "MCUCTRL->FEATUREENABLE";
  regNames[51] = "MCUCTRL->DEBUGGER";
  regNames[52] = "MCUCTRL->ADCPWRDLY";
  regNames[53] = "MCUCTRL->ADCCAL";
  regNames[54] = "MCUCTRL->ADCBATTLOAD";
  regNames[55] = "MCUCTRL->ADCTRIM";
  regNames[56] = "MCUCTRL->ADCREFCOMP";
  regNames[57] = "MCUCTRL->ADCREFCOMP";
  regNames[58] = "MCUCTRL->XTALCTRL";
  regNames[59] = "MCUCTRL->XTALGENCTRL";
  regNames[60] = "MCUCTRL->MISCCTRL";
  regNames[61] = "MCUCTRL->BOOTLOADER ";
  regNames[62] = "MCUCTRL->SHADOWVALID";
  regNames[63] = "MCUCTRL->SCRATCH0";
  regNames[64] = "MCUCTRL->SCRATCH1";
  regNames[65] = "MCUCTRL->ICODEFAULTADDR";
  regNames[66] = "MCUCTRL->DCODEFAULTADDR";
  regNames[67] = "MCUCTRL->SYSFAULTADDR";
  regNames[68] = "MCUCTRL->FAULTSTATUS";
  regNames[69] = "MCUCTRL->FAULTCAPTUREEN";
  regNames[70] = "MCUCTRL->DBGR1";
  regNames[71] = "MCUCTRL->DBGR2";
  regNames[72] = "MCUCTRL->PMUENABLE";
  regNames[73] = "MCUCTRL->TPIUCTRL";
  regNames[74] = "MCUCTRL->OTAPOINTER";
  regNames[75] = "MCUCTRL->SRAMMODE";
  regNames[76] = "MCUCTRL->KEXTCLKSEL";
  regNames[77] = "MCUCTRL->SIMOBUCK3 ";
  regNames[78] = "MCUCTRL->SIMOBUCK4";
  regNames[79] = "MCUCTRL->BLEBUCK2";
  regNames[80] = "MCUCTRL->FLASHWPROT0";
  regNames[81] = "MCUCTRL->FLASHWPROT1";
  regNames[82] = "MCUCTRL->FLASHRPROT0";
  regNames[83] = "MCUCTRL->FLASHRPROT1";
  regNames[84] = "MCUCTRL->DMASRAMWRITEPROTECT0";
  regNames[85] = "MCUCTRL->DMASRAMWRITEPROTECT1";
  regNames[86] = "MCUCTRL->DMASRAMREADPROTECT0";
  regNames[87] = "MCUCTRL->DMASRAMREADPROTECT1";
  regNames[88] = "CACHECTRL->CACHECFG ";
  regNames[89] = "CACHECTRL->FLASHCFG";
  regNames[90] = "CACHECTRL->CTRL";
  regNames[91] = "CACHECTRL->NCR0START";
  regNames[92] = "CACHECTRL->NCR0END";
  regNames[93] = "CACHECTRL->NCR1START";
  regNames[94] = "CACHECTRL->NCR1END";
  regNames[95] = "CACHECTRL->DMON0";
  regNames[96] = "CACHECTRL->DMON1";
  regNames[97] = "CACHECTRL->DMON2";
  regNames[98] = "CACHECTRL->DMON3";
  regNames[99] = "CACHECTRL->IMON0";
  regNames[100] = "CACHECTRL->IMON1";
  regNames[101] = "CACHECTRL->IMON2";
  regNames[102] = "CACHECTRL->IMON3";
  regNames[103] = "MSPI->CTRL";
  regNames[104] = "MSPI->CFG";
  regNames[105] = "MSPI->ADDR";
  regNames[106] = "MSPI->INSTR";
  regNames[107] = "MSPI->TXFIFO";
  regNames[108] = "MSPI->RXFIFO";
  regNames[109] = "MSPI->TXENTRIES";
  regNames[110] = "MSPI->RXENTRIES";
  regNames[111] = "MSPI->THRESHOLD";
  regNames[112] = "MSPI->MSPICFG";
  regNames[113] = "MSPI->PADCFG";
  regNames[114] = "MSPI->PADOUTEN";
  regNames[115] = "MSPI->FLASH";
  regNames[116] = "MSPI->SCRAMBLING";
  regNames[117] = "MSPI->INTEN";
  regNames[118] = "MSPI->INTSTAT";
  regNames[119] = "MSPI->INTCLR";
  regNames[120] = "MSPI->INTSET";
  regNames[121] = "MSPI->DMACFG";
  regNames[122] = "MSPI->DMASTAT";
  regNames[123] = "MSPI->DMATARGADDR";
  regNames[124] = "MSPI->DMADEVADDR";
  regNames[125] = "MSPI->DMATOTCOUNT";
  regNames[126] = "MSPI->DMABCOUNT";
  regNames[127] = "MSPI->DMATHRESH";
  regNames[128] = "MSPI->CQCFG";
  regNames[129] = "MSPI->CQADDR";
  regNames[130] = "MSPI->CQSTAT";
  regNames[131] = "MSPI->CQFLAGS";
  regNames[132] = "MSPI->CQSETCLEAR";
  regNames[133] = "MSPI->CQPAUSE";
  regNames[134] = "MSPI->CQCURIDX";
  regNames[135] = "MSPI->CQENDIDX";
  regNames[136] = "CLKGEN->CALXT";
  regNames[137] = "CLKGEN->CALRC";
  regNames[138] = "CLKGEN->ACALCTR";
  regNames[139] = "CLKGEN->OCTRL";
  regNames[140] = "CLKGEN->CLKOUT";
  regNames[141] = "CLKGEN->CLKKEY";
  regNames[142] = "CLKGEN->CCTRL";
  regNames[143] = "CLKGEN->STATUS";
  regNames[144] = "CLKGEN->HFADJ";
  regNames[145] = "CLKGEN->CLOCKENSTAT";
  regNames[146] = "CLKGEN->CLOCKEN2STAT";
  regNames[147] = "CLKGEN->CLOCKEN3STAT";
  regNames[148] = "CLKGEN->FREQCTRL";
  regNames[149] = "CLKGEN->BLEBUCKTONADJ";
  regNames[150] = "CLKGEN->INTRPTEN";
  regNames[151] = "CLKGEN->INTRPTSTAT";
  regNames[152] = "CLKGEN->INTRPTCLR";
  regNames[153] = "CLKGEN->INTRPTSET";

  regNames[154] = "RTC->CTRLOW";
  regNames[155] = "RTC->CTRUP";
  regNames[156] = "RTC->ALMLOW";
  regNames[157] = "RTC->ALMUP";
  regNames[158] = "RTC->RTCCTL";
  regNames[159] = "RTC->INTEN";
  regNames[160] = "RTC->INTSTAT";
  regNames[161] = "RTC->INTCLR";
  regNames[162] = "RTC->INTSET";
  
  regNames[163] = "ADC->CFG ";
  regNames[164] = "ADC->STAT";
  regNames[165] = "ADC->SWT";
  regNames[166] = "ADC->SL0CFG";
  regNames[167] = "ADC->SL1CFG";
  regNames[168] = "ADC->SL2CFG";
  regNames[168] = "ADC->SL3CFG";
  regNames[169] = "ADC->SL4CFG";
  regNames[170] = "ADC->SL5CFG";
  regNames[171] = "ADC->SL6CFG";
  regNames[172] = "ADC->SL7CFG";
  regNames[173] = "ADC->WULIM";
  regNames[174] = "ADC->WLLIM";
  regNames[175] = "ADC->SCWLIM";
  regNames[175] = "ADC->FIFO";
  regNames[176] = "ADC->FIFOPR";
  regNames[177] = "ADC->INTEN";
  regNames[178] = "ADC->INTSTAT";
  regNames[179] = "ADC->INTCLR";
  regNames[180] = "ADC->INTSET";
  regNames[181] = "ADC->DMATRIGEN";
  regNames[182] = "ADC->DMATRIGSTAT";
  regNames[183] = "ADC->DMACFG";
  regNames[184] = "ADC->DMATOTCOUNT";
  regNames[185] = "ADC->DMATARGADDR";
  regNames[186] = "ADC->DMASTAT";

  regNames[187] = "GPIO->PADREGA";
  regNames[188] = "GPIO->PADREGB";
  regNames[189] = "GPIO->PADREGC";
  regNames[190] = "GPIO->PADREGD";
  regNames[191] = "GPIO->PADREGE";
  regNames[192] = "GPIO->PADREGF";
  regNames[193] = "GPIO->PADREGG";
  regNames[194] = "GPIO->PADREGH";
  regNames[195] = "GPIO->PADREGI";
  regNames[196] = "GPIO->PADREGJ";
  regNames[197] = "GPIO->PADREGK";
  regNames[198] = "GPIO->PADREGL";
  regNames[199] = "GPIO->PADREGM";
  regNames[200] = "GPIO->CFGA";
  regNames[201] = "GPIO->CFGB";
  regNames[202] = "GPIO->CFGC";
  regNames[203] = "GPIO->CFGD";
  regNames[204] = "GPIO->CFGE";
  regNames[205] = "GPIO->CFGF";
  regNames[206] = "GPIO->CFGG";
  regNames[207] = "GPIO->PADKEY";
  regNames[208] = "GPIO->RDA";
  regNames[209] = "GPIO->RDB";
  regNames[210] = "GPIO->WTA";
  regNames[211] = "GPIO->WTB";
  regNames[212] = "GPIO->WTSA";
  regNames[213] = "GPIO->WTSB";
  regNames[214] = "GPIO->WTCA";
  regNames[215] = "GPIO->WTCB";
  regNames[216] = "GPIO->ENA";
  regNames[217] = "GPIO->ENB";
  regNames[218] = "GPIO->ENSA";
  regNames[219] = "GPIO->ENSB";
  regNames[220] = "GPIO->ENCA";
  regNames[221] = "GPIO->ENCB";
  regNames[222] = "GPIO->STMRCAP";
  regNames[223] = "GPIO->IOM0IRQ";
  regNames[224] = "GPIO->IOM1IRQ";
  regNames[225] = "GPIO->IOM2IRQ";
  regNames[226] = "GPIO->IOM3IRQ";
  regNames[227] = "GPIO->IOM4IRQ";
  regNames[228] = "GPIO->IOM5IRQ";
  regNames[229] = "GPIO->BLEIFIRQ";
  regNames[230] = "GPIO->GPIOOBS";
  regNames[231] = "GPIO->ALTPADCFGA";
  regNames[232] = "GPIO->ALTPADCFGB";
  regNames[233] = "GPIO->ALTPADCFGC";
  regNames[234] = "GPIO->ALTPADCFGD";
  regNames[235] = "GPIO->ALTPADCFGE";
  regNames[236] = "GPIO->ALTPADCFGF";
  regNames[237] = "GPIO->ALTPADCFGG";
  regNames[238] = "GPIO->ALTPADCFGH";
  regNames[239] = "GPIO->ALTPADCFGI";
  regNames[240] = "GPIO->ALTPADCFGJ";
  regNames[241] = "GPIO->ALTPADCFGK";
  regNames[242] = "GPIO->ALTPADCFGL";
  regNames[243] = "GPIO->ALTPADCFGM";
  regNames[244] = "GPIO->SCDET";
  regNames[245] = "GPIO->CTENCFG";
  regNames[246] = "GPIO->INT0EN";
  regNames[247] = "GPIO->INT0STAT";
  regNames[248] = "GPIO->INT0CLR";
  regNames[249] = "GPIO->INT0SET";
  regNames[250] = "GPIO->INT1EN";
  regNames[251] = "GPIO->INT1STAT";
  regNames[252] = "GPIO->INT1CLR";
  regNames[253] = "GPIO->INT1SET";

  regNames[254] = "CTIMER->TMR0";
  regNames[255] = "CTIMER->CMPRA0";
  regNames[256] = "CTIMER->CMPRB0";
  regNames[257] = "CTIMER->CTRL0";
  regNames[258] = "CTIMER->CMPRAUXA0";
  regNames[259] = "CTIMER->CMPRAUXB0";
  regNames[260] = "CTIMER->AUX0";
  regNames[261] = "CTIMER->TMR1";
  regNames[262] = "CTIMER->CMPRA1";
  regNames[263] = "CTIMER->CMPRB1";
  regNames[264] = "CTIMER->CTRL1";
  regNames[265] = "CTIMER->CMPRAUXA1";
  regNames[266] = "CTIMER->CMPRAUXB1";
  regNames[267] = "CTIMER->AUX1";
  regNames[268] = "CTIMER->TMR2";
  regNames[269] = "CTIMER->CMPRA2";
  regNames[270] = "CTIMER->CMPRB2";
  regNames[271] = "CTIMER->CTRL2";
  regNames[272] = "CTIMER->CMPRAUXA2";
  regNames[273] = "CTIMER->CMPRAUXB2";
  regNames[274] = "CTIMER->AUX2";
  regNames[275] = "CTIMER->TMR3";
  regNames[276] = "CTIMER->CMPRA3";
  regNames[277] = "CTIMER->CMPRB3";
  regNames[278] = "CTIMER->CTRL3";
  regNames[279] = "CTIMER->CMPRAUXA3";
  regNames[280] = "CTIMER->CMPRAUXB3";
  regNames[281] = "CTIMER->AUX3";
  regNames[282] = "CTIMER->TMR4";
  regNames[283] = "CTIMER->CMPRA4";
  regNames[284] = "CTIMER->CMPRB4";
  regNames[285] = "CTIMER->CTRL4";
  regNames[286] = "CTIMER->CMPRAUXA4";
  regNames[287] = "CTIMER->CMPRAUXB4";
  regNames[288] = "CTIMER->AUX4";
  regNames[289] = "CTIMER->TMR5";
  regNames[290] = "CTIMER->CMPRA5";
  regNames[291] = "CTIMER->CMPRB5";
  regNames[292] = "CTIMER->CTRL5";
  regNames[293] = "CTIMER->CMPRAUXA5";
  regNames[294] = "CTIMER->CMPRAUXB5";
  regNames[295] = "CTIMER->AUX5";
  regNames[296] = "CTIMER->TMR6";
  regNames[297] = "CTIMER->CMPRA6";
  regNames[298] = "CTIMER->CMPRB6";
  regNames[299] = "CTIMER->CTRL6";
  regNames[300] = "CTIMER->CMPRAUXA6";
  regNames[301] = "CTIMER->CMPRAUXB6";
  regNames[302] = "CTIMER->AUX6";
  regNames[303] = "CTIMER->TMR7";
  regNames[304] = "CTIMER->CMPRA7";
  regNames[305] = "CTIMER->CMPRB7";
  regNames[306] = "CTIMER->CTRL7";
  regNames[307] = "CTIMER->CMPRAUXA7";
  regNames[308] = "CTIMER->CMPRAUXB7";
  regNames[309] = "CTIMER->AUX7";
  regNames[310] = "CTIMER->GLOBEN";
  regNames[311] = "CTIMER->OUTCFG0";
  regNames[312] = "CTIMER->OUTCFG1";
  regNames[313] = "CTIMER->OUTCFG2";
  regNames[314] = "CTIMER->OUTCFG3";
  regNames[315] = "CTIMER->INCFG";
  regNames[316] = "CTIMER->INTEN";
  regNames[317] = "CTIMER->INTSTAT";
  regNames[318] = "CTIMER->INTCLR";
  regNames[319] = "CTIMER->INTSET";
}

and the results:

Code: Select all

BLEIF->FIFO			200201		200201		
BLEIF->FIFOPTR			20002000	20002000	
BLEIF->FIFOTHR			2020		2020		
BLEIF->FIFOPOP			C01		C01		
BLEIF->FIFOPUSH			0		0		
BLEIF->FIFOCTRL			3		3		
BLEIF->FIFOLOC			B01		B01		
BLEIF->CLKCFG			C01		C01		
BLEIF->CMD			A02		A02		
BLEIF->CMDRPT			0		0		
BLEIF->OFFSETHI			0		0		
BLEIF->CMDSTAT			80		80		
BLEIF->INTEN			18381		18381		
BLEIF->INTSTAT			4052		4052		
BLEIF->INTCLR			0		0		
BLEIF->DMATRIGEN		3		3		
BLEIF->DMATRIGSTAT		0		0		
BLEIF->DMACFG			0		0		
BLEIF->DMATOTCOUNT		0		0		
BLEIF->DMATARGADDR 		10007718	10007718	
BLEIF->DMASTAT			0		0		
BLEIF->CQCFG			0		0		
BLEIF->CQADDR			0		0		
BLEIF->CQSTAT			0		0		
BLEIF->CQFLAGS			8C00		8C00		
BLEIF->CQSETCLEAR		0		0		
BLEIF->CQPAUSEEN		0		0		
BLEIF->CQCURIDX			0		0		
BLEIF->CQENDIDX			0		0		
BLEIF->STATUS			4		4		
BLEIF->MSPICFG			200003		200003		
BLEIF->BLECFG			B		B		
PWRCTRL->SUPPLYSRC		1		1		
PWRCTRL->SUPPLYSTATUS		1		1		
PWRCTRL->DEVPWREN		2080		2080		
PWRCTRL->MEMPWDINSLEEP		6000		6000		
PWRCTRL->MEMPWREN		C0007FFF	C0007FFF	
PWRCTRL->MEMPWRSTATUS		1FFFF		1FFFF		
PWRCTRL->DEVPWRSTATUS		107		107		
PWRCTRL->SRAMCTRL		0		0		
PWRCTRL->ADCSTATUS		3F		3F		
PWRCTRL->MISC			1		1		
PWRCTRL->DEVPWREVENTEN		0		0		
PWRCTRL->MEMPWREVENTEN		0		0		
MCUCTRL->CHIPPN			6672198		6672198		
MCUCTRL->CHIPID0		CA240351	CA240351	
MCUCTRL->CHIPID1		5C91C374	5C91C374	
MCUCTRL->CHIPREV		ECF21		ECF21		
MCUCTRL->VENDORID		414D4251	414D4251	
MCUCTRL->SKU			3		3		
MCUCTRL->FEATUREENABLE		77		77		
MCUCTRL->DEBUGGER		0		0		
MCUCTRL->ADCPWRDLY		18A9		18A9		
MCUCTRL->ADCCAL			1		1		
MCUCTRL->ADCBATTLOAD		0		0		
MCUCTRL->ADCTRIM		280		280		
MCUCTRL->ADCREFCOMP		1F00		1F00		
MCUCTRL->ADCREFCOMP		1F00		1F00		
MCUCTRL->XTALCTRL		158		158		
MCUCTRL->XTALGENCTRL		1E0		1E0		
MCUCTRL->MISCCTRL		20		20		
MCUCTRL->BOOTLOADER 		4000000		4000000		
MCUCTRL->SHADOWVALID		7		7		
MCUCTRL->SCRATCH0		0		0		
MCUCTRL->SCRATCH1		0		0		
MCUCTRL->ICODEFAULTADDR		0		0		
MCUCTRL->DCODEFAULTADDR		0		0		
MCUCTRL->SYSFAULTADDR		0		0		
MCUCTRL->FAULTSTATUS		0		0		
MCUCTRL->FAULTCAPTUREEN		0		0		
MCUCTRL->DBGR1			12345678	12345678	
MCUCTRL->DBGR2			C001C0DE	C001C0DE	
MCUCTRL->PMUENABLE		1		1		
MCUCTRL->TPIUCTRL		0		0		
MCUCTRL->OTAPOINTER		0		0		
MCUCTRL->SRAMMODE		0		0		
MCUCTRL->KEXTCLKSEL		0		0		
MCUCTRL->SIMOBUCK3 		9D28689A	9D28689A	
MCUCTRL->SIMOBUCK4		310D10B5	310D10B5	
MCUCTRL->BLEBUCK2		C64C		C64C		
MCUCTRL->FLASHWPROT0		FFFFFFF8	FFFFFFF8	
MCUCTRL->FLASHWPROT1		FFFFFFFF	FFFFFFFF	
MCUCTRL->FLASHRPROT0		FFFFFFF8	FFFFFFF8	
MCUCTRL->FLASHRPROT1		FFFFFFFF	FFFFFFFF	
MCUCTRL->DMASRAMWRITEPROTECT0	0		0		
MCUCTRL->DMASRAMWRITEPROTECT1	0		0		
MCUCTRL->DMASRAMREADPROTECT0	0		0		
MCUCTRL->DMASRAMREADPROTECT1	0		0		
CACHECTRL->CACHECFG 		100781		100781		
CACHECTRL->FLASHCFG		873		873		
CACHECTRL->CTRL			4		4		
CACHECTRL->NCR0START		0		0		
CACHECTRL->NCR0END		0		0		
CACHECTRL->NCR1START		0		0		
CACHECTRL->NCR1END		0		0		
CACHECTRL->DMON0		0		0		
CACHECTRL->DMON1		0		0		
CACHECTRL->DMON2		0		0		
CACHECTRL->DMON3		0		0		
CACHECTRL->IMON0		0		0		
CACHECTRL->IMON1		0		0		
CACHECTRL->IMON2		0		0		
CACHECTRL->IMON3		0		0		
MSPI->CTRL			400		400		
MSPI->CFG			1		1		
MSPI->ADDR			0		0		
MSPI->INSTR			0		0		
MSPI->TXFIFO			BF72FBBF	BFF6FBBF	CHANGE
MSPI->RXFIFO			BF72FBBF	BFF6FBBF	CHANGE
MSPI->TXENTRIES			0		0		
MSPI->RXENTRIES			0		0		
MSPI->THRESHOLD			0		0		
MSPI->MSPICFG			C0000200	C0000200	
MSPI->PADCFG			0		0		
MSPI->PADOUTEN			0		0		
MSPI->FLASH			B060000		B060000		
MSPI->SCRAMBLING		0		0		
MSPI->INTEN			0		0		
MSPI->INTSTAT			8		8		
MSPI->INTCLR			0		0		
MSPI->INTSET			0		0		
MSPI->DMACFG			0		0		
MSPI->DMASTAT			0		0		
MSPI->DMATARGADDR		0		0		
MSPI->DMADEVADDR		0		0		
MSPI->DMATOTCOUNT		0		0		
MSPI->DMABCOUNT			0		0		
MSPI->DMATHRESH			8		8		
MSPI->CQCFG			0		0		
MSPI->CQADDR			0		0		
MSPI->CQSTAT			0		0		
MSPI->CQFLAGS			8300		8300		
MSPI->CQSETCLEAR		0		0		
MSPI->CQPAUSE			0		0		
MSPI->CQCURIDX			0		0		
MSPI->CQENDIDX			0		0		
CLKGEN->CALXT			0		0		
CLKGEN->CALRC			0		0		
CLKGEN->ACALCTR			0		0		
CLKGEN->OCTRL			0		0		
CLKGEN->CLKOUT			0		0		
CLKGEN->CLKKEY			0		0		
CLKGEN->CCTRL			0		0		
CLKGEN->STATUS			0		0		
CLKGEN->HFADJ			25B800		25B800		
CLKGEN->CLOCKENSTAT		3000185A	1000185A	CHANGE
CLKGEN->CLOCKEN2STAT		5000		5000		
CLKGEN->CLOCKEN3STAT		13000000	13000000	
CLKGEN->FREQCTRL		0		0		
CLKGEN->BLEBUCKTONADJ		F80400F		F80400F		
CLKGEN->INTRPTEN		0		0		
CLKGEN->INTRPTSTAT		4		4		
CLKGEN->INTRPTCLR		0		0		
CLKGEN->INTRPTSET		0		0		
RTC->CTRLOW			1043559		1053555		CHANGE
RTC->CTRUP			101		101		
RTC->ALMLOW			0		0		
RTC->ALMUP			0		0		
RTC->RTCCTL			0		0		
RTC->INTEN			0		0		
RTC->INTSTAT			0		0		
RTC->INTCLR			0		0		
RTC->INTSET			0		0		
ADC->CFG 			0		0		
ADC->STAT			1		1		
ADC->SWT			0		0		
ADC->SL0CFG			0		0		
ADC->SL1CFG			0		0		
ADC->SL3CFG			0		0		
ADC->SL4CFG			0		0		
ADC->SL5CFG			0		0		
ADC->SL6CFG			0		0		
ADC->SL7CFG			0		0		
ADC->WULIM			0		0		
ADC->WLLIM			0		0		
ADC->FIFO			0		0		
ADC->FIFOPR			0		0		
ADC->INTEN			0		0		
ADC->INTSTAT			0		0		
ADC->INTCLR			0		0		
ADC->INTSET			0		0		
ADC->DMATRIGEN			0		0		
ADC->DMATRIGSTAT		0		0		
ADC->DMACFG			0		0		
ADC->DMATOTCOUNT		0		0		
ADC->DMATARGADDR		10000000	10000000	
ADC->DMASTAT			0		0		
GPIO->PADREGA			18181818	18181818	
GPIO->PADREGB			18181818	18181818	
GPIO->PADREGC			18181818	18181818	
GPIO->PADREGD			18181818	18181818	
GPIO->PADREGE			18181818	18181818	
GPIO->PADREGF			18180202	18180202	
GPIO->PADREGG			18181818	18181818	
GPIO->PADREGH			18181818	18181818	
GPIO->PADREGI			18181818	18181818	
GPIO->PADREGJ			18181818	18181818	
GPIO->PADREGK			18181818	18181818	
GPIO->PADREGL			18181818	18181818	
GPIO->PADREGM			300		300		
GPIO->CFGA			0		0		
GPIO->CFGB			0		0		
GPIO->CFGC			110000		110000		
GPIO->CFGD			0		0		
GPIO->CFGE			0		0		
GPIO->CFGF			0		0		
GPIO->CFGG			0		0		
GPIO->PADKEY			0		0		
GPIO->RDA			0		0		
GPIO->RDB			20000		20000		
GPIO->WTA			0		0		
GPIO->WTB			0		0		
GPIO->WTSA			0		0		
GPIO->WTSB			0		0		
GPIO->WTCA			0		0		
GPIO->WTCB			0		0		
GPIO->ENA			0		0		
GPIO->ENB			0		0		
GPIO->ENSA			0		0		
GPIO->ENSB			0		0		
GPIO->ENCA			0		0		
GPIO->ENCB			0		0		
GPIO->STMRCAP			3F3F3F3F	3F3F3F3F	
GPIO->IOM0IRQ			3F		3F		
GPIO->IOM1IRQ			3F		3F		
GPIO->IOM2IRQ			3F		3F		
GPIO->IOM3IRQ			3F		3F		
GPIO->IOM4IRQ			3F		3F		
GPIO->IOM5IRQ			3F		3F		
GPIO->BLEIFIRQ			3F		3F		
GPIO->GPIOOBS			0		0		
GPIO->ALTPADCFGA		0		0		
GPIO->ALTPADCFGB		0		0		
GPIO->ALTPADCFGC		0		0		
GPIO->ALTPADCFGD		0		0		
GPIO->ALTPADCFGE		0		0		
GPIO->ALTPADCFGF		0		0		
GPIO->ALTPADCFGG		0		0		
GPIO->ALTPADCFGH		0		0		
GPIO->ALTPADCFGI		0		0		
GPIO->ALTPADCFGJ		0		0		
GPIO->ALTPADCFGK		0		0		
GPIO->ALTPADCFGL		0		0		
GPIO->ALTPADCFGM		0		0		
GPIO->SCDET			3F		3F		
GPIO->CTENCFG			FFFFFFFF	FFFFFFFF	
GPIO->INT0EN			0		0		
GPIO->INT0STAT			0		0		
GPIO->INT0CLR			0		0		
GPIO->INT0SET			0		0		
GPIO->INT1EN			0		0		
GPIO->INT1STAT			0		0		
GPIO->INT1CLR			0		0		
GPIO->INT1SET			0		0		
CTIMER->TMR0			0		0		
CTIMER->CMPRA0			0		0		
CTIMER->CMPRB0			0		0		
CTIMER->CTRL0			0		0		
CTIMER->CMPRAUXA0		0		0		
CTIMER->CMPRAUXB0		0		0		
CTIMER->AUX0			0		0		
CTIMER->TMR1			0		0		
CTIMER->CMPRA1			0		0		
CTIMER->CMPRB1			0		0		
CTIMER->CTRL1			0		0		
CTIMER->CMPRAUXA1		0		0		
CTIMER->CMPRAUXB1		0		0		
CTIMER->AUX1			0		0		
CTIMER->TMR2			0		0		
CTIMER->CMPRA2			0		0		
CTIMER->CMPRB2			0		0		
CTIMER->CTRL2			0		0		
CTIMER->CMPRAUXA2		0		0		
CTIMER->CMPRAUXB2		0		0		
CTIMER->AUX2			0		0		
CTIMER->TMR3			0		0		
CTIMER->CMPRA3			0		0		
CTIMER->CMPRB3			0		0		
CTIMER->CTRL3			0		0		
CTIMER->CMPRAUXA3		0		0		
CTIMER->CMPRAUXB3		0		0		
CTIMER->AUX3			0		0		
CTIMER->TMR4			0		0		
CTIMER->CMPRA4			0		0		
CTIMER->CMPRB4			0		0		
CTIMER->CTRL4			0		0		
CTIMER->CMPRAUXA4		0		0		
CTIMER->CMPRAUXB4		0		0		
CTIMER->AUX4			0		0		
CTIMER->TMR5			0		0		
CTIMER->CMPRA5			0		0		
CTIMER->CMPRB5			0		0		
CTIMER->CTRL5			0		0		
CTIMER->CMPRAUXA5		0		0		
CTIMER->CMPRAUXB5		0		0		
CTIMER->AUX5			0		0		
CTIMER->TMR6			0		0		
CTIMER->CMPRA6			0		0		
CTIMER->CMPRB6			0		0		
CTIMER->CTRL6			0		0		
CTIMER->CMPRAUXA6		0		0		
CTIMER->CMPRAUXB6		0		0		
CTIMER->AUX6			0		0		
CTIMER->TMR7			42709276	427E8D3A	CHANGE
CTIMER->CMPRA7			0		0		
CTIMER->CMPRB7			7000		7000		
CTIMER->CTRL7			20D018D		20C018D		CHANGE
CTIMER->CMPRAUXA7		0		0		
CTIMER->CMPRAUXB7		0		0		
CTIMER->AUX7			0		0		
CTIMER->GLOBEN			FFFF		FFFF		
CTIMER->OUTCFG0			24922292	24922292	
CTIMER->OUTCFG1			24922292	24922292	
CTIMER->OUTCFG2			24922292	24922292	
CTIMER->OUTCFG3			12		12		
CTIMER->INCFG			0		0		
CTIMER->INTEN			8000		8000		
CTIMER->INTSTAT			0		0		
CTIMER->INTCLR			0		0		
CTIMER->INTSET			0		0		

[paulvha]

Try this sketch.

For me the output shows clearly that BLE is turned ON and OFF in the DEVPWREN Register :

BLE test
Before: 0x0
After begin(): 0x1
After end(): 0x0

Code: Select all

#include "ArduinoBLE.h"

void setup() {
  Serial.begin(115200);
  delay(1000);
  Serial.println("BLE test");
}

void loop() {
  Serial.printf("Before: 0x%lx\n",PWRCTRL->DEVPWREN_b.PWRBLEL);

  BLE.begin();
  Serial.printf("After begin(): 0x%lx\n",PWRCTRL->DEVPWREN_b.PWRBLEL);

  BLE.end();
  Serial.printf("After end(): 0x%lx\n",PWRCTRL->DEVPWREN_b.PWRBLEL);

  while(1);
}

[tomts]

No luck. I tried it on three different boards. All 3 left BLE enabled. Then I deleted ArduinoBLE from my computer and reloaded it, and deleted all the Temp files to force it to compile with the new library. Same results - BLE still enabled. I'm on Windows 11 Home, Arduino IDE 2.0.4, and ArduinoBLE 1.3.3. The Artemis boards are fairly new and the few I checked were version B0. I'm at a loss. Is there something else I should be reloading? What software versions are you running?

Before reload
First Artemis Module:
�BLE test
Before: 0x0
After begin(): 0x1
After end(): 0x1

Second Artemis Module:
�BLE test
Before: 0x0
After begin(): 0x1
After end(): 0x1

RedBoard Artemis ATP:
BLE test
Before: 0x0
After begin(): 0x1
After end(): 0x1

After ArduinoBLE reload
RedBoard Artemis ATP:
BLE test
Before: 0x0
After begin(): 0x1
After end(): 0x1

Second Artemis Module:
�BLE test
Before: 0x0
After begin(): 0x1
After end(): 0x1

[paulvha]

try to reinstall ArduinoBLE. Looks to me there is something wrong with your file HCITransport.cpp in src/util..

I use ArduinoBLE 1.3.3 on Ubuntu 22.04

[tomts]

I reloaded both Arduino IDE and ArduinoBLE (this time directly from GitHub) on my Windows 11 computer and ran your code yet again. Same results - BLE is still enabled after BLE.end(). I then resurrected an old computer running Ubuntu. This time, BLE was DISabled. Then, I very painfully tested it on an even older Windows 10 computer which left BLE enabled. There is very limited data, but I'm starting to suspect that this is only a problem when running Windows. Is there anyone following this thread that can test it on their computer?

Also - is there a file called HCITransport.cpp? I can't find it either on my computer or GitHub. It bothers me because the Arduino IDE allows me to track BLE.end() to HCITransport.h (which does exist), but I can go no further without HCITransport.cpp.

[paulvha]

HI,

Actually, my version is 1.3.2 + changes that were applied to support the new ARDUINO_GIGA and make it 1.3.3 for me. That is because I have made other stability changes to ArduinoBLE that I don't want to loose.

I have just downloaded the 1.3.3 and tested. I now get the issue as you.

It turns out that ArduinoBLE has applied an incorrect change. As you look at the changes applied (https://github.com/arduino-libraries/Ar ... 871a38a686) you will see that line 238 in HCICordioTransport.cpp it got a totally different meaning. Now it WILL call terminate where it should NOT
( btw the file HCICordioTransport.cpp that is in the file I had planned to refer to before)

Code: Select all

-#if !defined(ARDUINO_PORTENTA_H7_M4) && !defined(ARDUINO_PORTENTA_H7_M7) && !defined(ARDUINO_NICLA_VISION)
+#if defined(ARDUINO_PORTENTA_H7_M4) || defined(ARDUINO_PORTENTA_H7_M7) || defined(ARDUINO_NICLA_VISION) || defined(ARDUINO_GIGA)
  CordioHCIHook::getDriver().terminate();
#endif

line 238 should read :

Code: Select all

#if !defined(ARDUINO_PORTENTA_H7_M4) && !defined(ARDUINO_PORTENTA_H7_M7) && !defined(ARDUINO_NICLA_VISION) && !defined(ARDUINO_GIGA)
  CordioHCIHook::getDriver().terminate();
#endif

Now it all works as it should. Either make the change in the file : ArduinoBLE/src/utility/HCICordioTransport.cpp at line 238 or use the attached HCICordioTransport.cpp.
I will post an issue on ArduinoBLE github. let me know whether this works for you.

[tomts]

YES!! You got it. Your code leaves the BLE disabled, as it should, and my application now repeatedly sleeps using 2.6 uA, wakes up, broadcasts, and goes back to sleep. Many thanks for sticking with me through all of this.