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What are we doing right with Artemis? What are we doing wrong? Let us know here!
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By Oxcart
I am new to the Spark Fun Thing Plus - Artemis board. I want to use my Segger J-Link device with it. I was reviewing the schematic drawings of the Thing Plus and the SWD interface depicted is confusing to me. Does the Thing Plus use the conventional SWD pin layout?

I expect this (SWD on left side of schematic): ... 1486589973

Look at the "SWD Program/Debug Interface" section of the Thing Plus schematic: ... ematic.pdf


If it's the same, what is the purpose of defining the pins out of order? If it's different, why?

Thank you!
User avatar
By robin_hodgson
The two boards use different silicon debug interfaces. The Thing Plus uses SWD and the other board uses JTAG. To oversimplify a bit, you can consider SWD as being a subset of JTAG, as if it were "JTAG Lite". The Artemis chip has SWD support, so the connector is wired up with the SWD names for the signals. Other chips may support the full JTAG interface, so their debug connector will be wired up using the JTAG names.

The important thing is that the J-Link debugger knows how to speak both protocols. When you configure the debugger in your build environment and explain what processor you are using, the IDE will arrange to use the correct interface for the chip you are debugging. It's all pretty slick, if you ask me.
User avatar
By Oxcart
I answered my own questions.

1) The SWD pin layout on the Spark Fun Thing Plus is the standard SWD pin layout
2) The reasoning for the pin layout to be enumerated out of order in the schematic is due to convention (i.e. reset at the top)
User avatar
By kjalali
Robin- First I want to thank you for the excellent job in creating the guide for using Segger Embedded Studio with Artemis.

I have followed the instructions in your guide and I was able to create, compile, flash, and debug the Hello World sample on the Artemis red board

Next, I have tried to import one of the example projects from the Ambiq SDK V 2.2.0 under AmbiqSuite-Rel2.2.0\boards\apollo3_evb\examples\ble_freertos_amdtps\keil that I could build with Keil with no problem. However, I was not able to build this project with SES as one of the files could not compile due to the following error as you can see in the attached snapshot:
#35: #error directive: This port can only be used when the project options are configured to enable hardware floating point support.

When compiling the project with Keil, there is no such problem but it happens when building with SES.

I am new to SES and I do not know how and where to set the __TARGET_FPU_VFP directive for the compiler when using SES.

I would appreciate any help.
User avatar
By robin_hodgson
Congratulations, you have found one of the main updates between version 1V6 and 1V7 of the doc. My apologies for not publishing version 1V7 before now. I had been worried about generating endless versions of it so I had been sitting on 1V7 until more reports came in. Yours is the first one in 6 months, and 1V7 already covers it, so here we go...

I will attach the 1V7 version to this thread for completeness. In the meantime, here is the specific section within it that may fix your problem:
The Apollo3 is a Cortex M4F, meaning that it supports hardware single-precision floating point. Segger needs to know that when it builds, it should use the “hard float ABI” to take full advantage of the hardware floating point mechanisms that are present in the Apollo3. To do that, click ‘Project/Options/Code/Code Generation’, then click on the ‘ARM FP ABI Type’. Use the pull-down menu to select ‘hard’. The ‘soft’ options are for processors that do not support hardware floating point, or perhaps if you needed to interface to a binary library that was built with soft FP. Since the point of this whole section is to build Ambiq Suite as part of a project, it works best if absolutely everything is using hard FP.
Select the option in your project as above, and rebuild everything clean. It should work at that point.
User avatar
By kjalali
Thank you so much Robin for your quick response. I changed the FPU option to FPv4-SP as you suggested and I was able to successful compile all files in the project :P .
However, during the final link phase, it came up with the following error:
L6031U: Could not open scatter description file .ble_freertos_amdtps.sct: No such file or directory

I am anxiously waiting for V1.7 of your document. I also had the same upload problem on this site when attempted to attach the snapshot of the error.
User avatar
By robin_hodgson
The ".sct" file is a Keil-specific linker file which is not going to work with Segger. It appears to explain to the Keil linker where the SRAM and FLASH sits in the Apollo3 address space.

To be honest, I am not sure how to build those examples. Try building from the GCC directory as a starting point instead of the Keil directory just to make sure that your build is not accidentally including any Keil-specific things. Also, make sure that you have done all the Segger linker setup as described in the 1V6 doc. If you do all that, there will be no reason for the build system to look for a".sct" file.
User avatar
By kjalali
I can successfully build from the gcc directory using the command line in git bash and GNU Tools for ARM and provided makefile under that directory. However, unlike keil, gcc is not one of the import project options supported by SES.

I guess I need to read your guide more carefully and make sure I have not left anything out. Thanks again for your help.
User avatar
By robin_hodgson
Going back to your original post, the error was "L6031U: Could not open scatter description file .ble_freertos_amdtps.sct: No such file or directory". I can see that file located in the Keil project directory, so if SES is generating the error message, then maybe it needs to have a path described somehow because the file certainly exists. Sorry, I'm not going to be much more help: I didn't even know that SES could import a project! :)
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