- Mon Jan 23, 2012 10:55 pm
#138715
I'm planning to add an ADXL345 3-axis digital accelerometer to my Logomatic V2, and I'd like to get comments from the forum before I let the smoke out of the chips.
I need to get the V2 to log data as fast as possible (3 axes @ 1 kHz is my minimum requirement, 3.2 KHz is ADXL345 max), so I'm planning lots of s/w changes beyond the minimum needed to talk to the ADXL345.
I plan to connect the ADXL345 to the V2 as follows (via a breakout board to include decoupling caps):
I intend to use the PackageTracker ADXL345 code, though that decision may change if that code is unable to support high data rates and key device features.
Other V2 software changes I'm planning include:
I haven't developed code for the V2 or the LPC2148 before: Any debugging hints I should know?
Comments on all the above?
Any suggestions for other changes?
Once I get everything working, where would be the best place to publish my code for ease of access by the SFE community? GitHub?
Thanks!
I need to get the V2 to log data as fast as possible (3 axes @ 1 kHz is my minimum requirement, 3.2 KHz is ADXL345 max), so I'm planning lots of s/w changes beyond the minimum needed to talk to the ADXL345.
I plan to connect the ADXL345 to the V2 as follows (via a breakout board to include decoupling caps):
Code: Select all
Note: Map LPC2148 pin 15 ("P1" on J6-2) as EINT3. ADXL345 signal: Vdd GND - GND GND Vs CS Int1 Int2 - - SDO SDI SCLK
ADXL345 pin: 1 2 3 4 5 6 7 8 9 10 11 12 13 14
Logomatic V2: VCC GND - GND GND VCC CS1 P1 ??? - - MISO1 MOSI1 SCLK1
I intend to use the PackageTracker ADXL345 code, though that decision may change if that code is unable to support high data rates and key device features.
Other V2 software changes I'm planning include:
Code: Select all
There are lots of other things I'd like to change, but they won't help me toward my immediate goal of logging ADXL345 data as rapidly as possible with minimal risk of data loss.1. Logging:
- Pre-allocate log file:
- Default to all of free uSD space, though this could make for a long startup.
- Erase any allocated sector needing it. Easily avoidable by formatting first.
- When closing the log file:
- Truncate file to actual space used (free excess allocation).
- Set the file modification time to match that of the config file.
- Binary mode:
- Write '$$' separator less often (or not at all) to reduce non-data uSD bandwidth
(presently 25% loss for a 3-ADC read).
- Start binary log file with a shebang and a self-dumping script:
- Executing the log file under Linux/Windows(Cygwin)/MacOS creates a CSV translation.
- Include field names and brief descriptions.
- Script also documents binary translation algorithm changes across releases.
2. Config file:
- New option to set log file pre-allocation size in KB. (Or default to all free uSD space?)
- New option to log RTC tick counter with each sample. (Or use hack, "Trigger Character = t"?)
3. uSD buffers:
- Maximize number of uSD buffers to cope with uSD timing irregularities.
- Optimize system RAM use.
4. RTC:
- Configure RTC from PCLK to avoid anomalous tick counter reads.
- Consider initializaing RTC date/time from config file modification timestamp.
I haven't developed code for the V2 or the LPC2148 before: Any debugging hints I should know?
Comments on all the above?
Any suggestions for other changes?
Once I get everything working, where would be the best place to publish my code for ease of access by the SFE community? GitHub?
Thanks!
Last edited by TriBob on Mon Jan 23, 2012 11:16 pm, edited 2 times in total.