Azimon wrote:It is using X2 and has a 6MHz crystal, SMCLK is (should be) derived from this.
As far as what the WDT is using, I guess that is one of the things I have to set up (but how?)
I must still not be making myself clear!
If you look at figure 4-1 you will see that there are several clock sources. These sources actually create clocks at different frequencies. Sounds like you are using X2 with a 6MHz clock. But I suspect the DCO is also active and generating a clock of unknown frequency.
Now look at the various muxes on that diagram. Notice that you can route the X2 and DCO clocks to various combinations of ACLK, SMCLK, and MCLK. You need to know what the state of those muxes are to know what source (X2, DCO, ...) is connected to what clock (ACLK, SMCLK, MCLK).
Once you know that, then you can determine what clock (ACLK or SMCLK) you want to use for the WDT.
So back to the homework, what values to you have loaded into the clock control registers? Then use those values to decode the DCO frequency and the interconnection of clock sources to clocks. With that information, you can make an intelligent decision as to how to configure the WDT (ACLK or SMCLK and that the divisor should be).
Thanks for changing the topic title!