UART Communication issue with MSP430F6779

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kamaldevkr
Posts: 1
Joined: Fri Dec 06, 2013 4:51 am

UART Communication issue with MSP430F6779

Post by kamaldevkr » Fri Dec 06, 2013 4:59 am

I am trying to communicate to my PC from Msp430f6779, In the board the RS 485 driver connected to UCA3 (P41 & P42). . I verified the line by line execution of code. But the defined interrupt is not getting executed while sending data to IC from PC. Can u please identify the issue in my code.

Thanks for any help and suggestions.


#include <msp430.h>
#include<stdint.h>
#define P4DIR_INIT (BIT0 | BIT2)
#define P4SEL0_INIT (BIT1 | BIT2 )
#define P4OUT_INIT (BIT0)
volatile int c = 0;
static const uint8_t mod_patterns[] =
{
0x00, 0x01, 0x11, 0x51, 0x55, 0x5D, 0xDD, 0xDF
};
void main(void)
{


WDTCTL = WDTPW | WDTHOLD; // Stop WDT
P4SEL0 |= P4SEL0_INIT; // Set P4.1, P4.2 to non-IO
P4DIR |= P4DIR_INIT; // Enable UCA3RXD, UCA3TXD
P4OUT &= ~BIT0; // the direction of RS 485 driver is controlled by this port(P4.0) , This is set in low to enable reception

// Setup LFXT1
UCSCTL6 &= ~(XT1OFF); // XT1 On
UCSCTL6 |= XCAP_3; // Internal load cap
// Loop until XT1 fault flag is cleared
do
{
UCSCTL7 &= ~(XT2OFFG | XT1LFOFFG | DCOFFG);
// Clear XT2,XT1,DCO fault flags
SFRIFG1 &= ~OFIFG; // Clear fault flags
} while (SFRIFG1 & OFIFG); // Test oscillator fault flag ///Result : test success on execution,

// Setup eUSCI_A0
UCA3CTLW0 |= UCSWRST; // **Put state machine in reset**
UCA3CTLW0 |= UCSSEL_1; // CLK = ACLK
UCA3BRW_L = 0x03; // 32kHz/9600=3.41 (see User's Guide)
UCA3BRW_H = 0x00; //
UCA3MCTLW = 0x9200; // Modulation UCBRSx=0x92, UCBRFx=0
UCA3CTLW0 &= ~UCSWRST; // **Initialize USCI state machine**
UCA3IE |= UCRXEIE; // Enable USCI_A3 RX interrupt

__bis_SR_register(LPM3_bits | GIE); // Enter LPM3, interrupts enabled
while(1)
{
c++;
c--; //Break point-----Check the value of c to find out the number of characters received.
}
}

// USCI_A0 interrupt service routine
#pragma vector=USCI_A3_VECTOR
__interrupt void USCI_A3_ISR(void)
{
c++;
switch (__even_in_range(UCA3IV, 8))
{
case USCI_NONE: break; // No interrupt
case USCI_UART_UCRXIFG: // RXIFG
while (!(UCA3IFG & UCTXIFG)) ; // USCI_A3 TX buffer ready?
UCA3TXBUF = UCA3RXBUF; // TX -> RXed character
break;
case USCI_UART_UCTXIFG: break; // TXIFG
case USCI_UART_UCSTTIFG: break; // TTIFG
case USCI_UART_UCTXCPTIFG: break; // TXCPTIFG
default: break;
}
}

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