Help setting up Watchdog Timer for MSP430F1612

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Azimon
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Help setting up Watchdog Timer for MSP430F1612

Post by Azimon » Tue Aug 23, 2011 11:09 pm

Hi. I need some help setting up the Watchdog Timer for the 1612 and using it. I am not an embedded developer per-se, though I can tweak the logic parts of my application, and this is why I need help with this. Thanks very much.
Last edited by Azimon on Wed Aug 24, 2011 9:07 am, edited 1 time in total.

fll-freak
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Re: Help setting up Watchdog Timer for 1612

Post by fll-freak » Wed Aug 24, 2011 6:52 am

What do you want the WDT to do? Act as a watchdog? Act as a timer? At what rate? What clock source?

Have you read chapter 10 of the User Guide (slau049f.pdf)?

Azimon
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Re: Help setting up Watchdog Timer for 1612

Post by Azimon » Wed Aug 24, 2011 8:05 am

fll-freak wrote:What do you want the WDT to do? Act as a watchdog? Act as a timer? At what rate? What clock source?

Have you read chapter 10 of the User Guide (slau049f.pdf)?
Hi. I read Chapter 10 but sorry it is beyond my skills at the moment to understand and trust what ever solution I might hack out. I realize that people don't like to be asked for code but I don't have any option at the moment.

I would like the WDT to fire if not stroked for 4 seconds. I have a routine that runs every 1 second and that is where I will put the code to stroke it. I would put the code to initialize the WDT in a routine I know runs only once on power up. My clock source is Timer A and the crystal is a 6MHz one.

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Re: Help setting up Watchdog Timer for 1612

Post by fll-freak » Wed Aug 24, 2011 8:33 am

We are getting closer.

You may use TimerA to schedule a task, but it is not the clock source of the WDT.

The WDT may be run from either the SMCLK or the ACLK (figure 10-1). These clock also not be clocking all the time based on the power modes you are operating in.

Sorry to say, but to answer your question, you are going to have to dig into the guts of your program and the interaction with the hardware. There is no way around it.

First you need to know how the ACLK and the SMCLK are configured. Figure 4-1 shows you the sources for each clock and the bits that are used to control the clock "beast". You will also need to know what rates each clock is operating at.

Next you will need to understand what power operating modes your software uses. Based on the mode, some clocks get turned off.

With that basic knowledge you can start to figure out how to get your WDT configured.

From memory, 4 seconds may be above the duration you can expect from the WDT unless you set a clock for a very slow rate. But if that is the case, there are any number of SW tricks to counter tht problem.

Azimon
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Re: Help setting up Watchdog Timer for 1612

Post by Azimon » Wed Aug 24, 2011 8:46 am

fll-freak wrote:We are getting closer.

First you need to know how the ACLK and the SMCLK are configured. Figure 4-1 shows you the sources for each clock and the bits that are used to control the clock "beast". You will also need to know what rates each clock is operating at.

Next you will need to understand what power operating modes your software uses. Based on the mode, some clocks get turned off.
Some answers:
1. I believe the clock is SMCLK
2. The application does not use any lower power modes, it is always on (constant power)

I say I think it is SMCLK because os this code:

Code: Select all

void TimerTickInit()
{
  TBCCTL0 = CCIE;                           // CCR0 interrupt enabled
  TBCCR0 = HARDWARE_TIMER_RELOAD_COUNT;
  TBCTL = TBSSEL_2 + MC_2;                  // SMCLK, contmode
}
Last edited by Azimon on Wed Aug 24, 2011 9:13 am, edited 1 time in total.

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Re: Help setting up Watchdog Timer for MSP430F1612

Post by fll-freak » Wed Aug 24, 2011 9:02 am

I misled you a bit.

ACLK, MCLK, and SMCLK are available to be used by various peripherals. The sources for these clocks are the LFXT1, XT2, or the DCO. How the sources are configured is an important consideration.

Homework: Figure out what gets loaded into DCOCTL, BCSCTL1, and BSSCTL2. Then use the tables starting on page 4-15, figure 4-1, and the rest of chapter 4 to figure out how your clock system is configured.

If you never put the MSP into any of the low power modes, than you have your choice of ACLK and SMCLK for the WDT. From the above work, you will know what the clock rates are of the ACLK and SMCLCK. You can then use that knowledge to pick the best source and configure the other registers to get what behaviour you want.

The sample code you provided simply shows that timerA in configured to use SMCLK as its input. It does not indicate the speed of the clock nor does it specify that SMCLK is used for the WDT.

PS: Can you please edit the title of the thread to be MSP430F1612? It will help future searching.

Azimon
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Re: Help setting up Watchdog Timer for MSP430F1612

Post by Azimon » Wed Aug 24, 2011 9:17 am

fll-freak wrote:
The sample code you provided simply shows that timerA in configured to use SMCLK as its input. It does not indicate the speed of the clock nor does it specify that SMCLK is used for the WDT.
It is using X2 and has a 6MHz crystal, SMCLK is (should be) derived from this.
As far as what the WDT is using, I guess that is one of the things I have to set up (but how?)

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Re: Help setting up Watchdog Timer for MSP430F1612

Post by fll-freak » Wed Aug 24, 2011 9:56 am

Azimon wrote:It is using X2 and has a 6MHz crystal, SMCLK is (should be) derived from this.
As far as what the WDT is using, I guess that is one of the things I have to set up (but how?)
I must still not be making myself clear!

If you look at figure 4-1 you will see that there are several clock sources. These sources actually create clocks at different frequencies. Sounds like you are using X2 with a 6MHz clock. But I suspect the DCO is also active and generating a clock of unknown frequency.

Now look at the various muxes on that diagram. Notice that you can route the X2 and DCO clocks to various combinations of ACLK, SMCLK, and MCLK. You need to know what the state of those muxes are to know what source (X2, DCO, ...) is connected to what clock (ACLK, SMCLK, MCLK).

Once you know that, then you can determine what clock (ACLK or SMCLK) you want to use for the WDT.

So back to the homework, what values to you have loaded into the clock control registers? Then use those values to decode the DCO frequency and the interconnection of clock sources to clocks. With that information, you can make an intelligent decision as to how to configure the WDT (ACLK or SMCLK and that the divisor should be).

Thanks for changing the topic title!

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Re: Help setting up Watchdog Timer for MSP430F1612

Post by fll-freak » Wed Aug 24, 2011 10:15 am

One solution that comes to mind is to check if you are using ACLK for any of your peripherals and see if you are using the DCO for anything.

If not, you could configure the DCO to output on ACLK and use ACLK for the WDT. By adjusting the divisor and the DCO, you might be able to get your 4 second period.

If you already have the DCO and ACLK commited to other work your options become fewer. You will have to accept either the ACLK or SMCLK at whatever frequency they are set for and your only adjustment would be the WDT divisor. That may not get you anywhere close to the time period you want.

You will also want to read the following article that should be mandatory reading for any embedded software user:
http://www.ganssle.com/watchdogs.pdf

Azimon
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Re: Help setting up Watchdog Timer for MSP430F1612

Post by Azimon » Wed Aug 24, 2011 11:26 am

fll-freak wrote:One solution that comes to mind is to check if you are using ACLK for any of your peripherals and see if you are using the DCO for anything.

If not, you could configure the DCO to output on ACLK and use ACLK for the WDT. By adjusting the divisor and the DCO, you might be able to get your 4 second period.
I don't think I am using ACLK or DCO, but, as far as I can see from figure 4-1 you can't route the DCO to ACLK (only MCLK)

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Re: Help setting up Watchdog Timer for MSP430F1612

Post by fll-freak » Wed Aug 24, 2011 2:27 pm

I hate to even suggest this approach, but...

You could simply turn the WDT timer on with the largest divisor and one clock then the other and simply see how long it takes to reboot. If it takes a long time, decrease the divisor. If it takes to little time, try the other clock. The value to plug into the WDT register is not hard to figure out. There are a gazillion #defines in the proper chip .h file to make it even simpler.

But I am still of the firm approach you should decode the clock control registers to understand how you are set up.

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