- Fri Aug 12, 2011 10:53 am
#131717
I have setup an ATMega328P to interface with this board. I know TWI is working because I have EEPROM that is returning data. When I examine the TWI data via logic analyzer, I can see the Start + Slave Addr (R/W=0), but the chip is replying with a NACK. Has anybody else gotten this to work? I'm using the Example code from the product page.
I know the chip won't respond with an ACK after the reset command is sent, but I can't even get the chip to send an ACK after I send TWI start + slave address + W. I've tried various TWI bus speeds of 400kHz, 100kHz and 40kHz, all with the same result. My logic analyzer is showing the time between clock transitions correctly, so I know the bus speed is being set correctly. I have pull-up resistors in place, and can read 128KB of data from the EEPROM, no problem.
I'll update this post later with the logic analyzer session data.
I know the chip won't respond with an ACK after the reset command is sent, but I can't even get the chip to send an ACK after I send TWI start + slave address + W. I've tried various TWI bus speeds of 400kHz, 100kHz and 40kHz, all with the same result. My logic analyzer is showing the time between clock transitions correctly, so I know the bus speed is being set correctly. I have pull-up resistors in place, and can read 128KB of data from the EEPROM, no problem.
I'll update this post later with the logic analyzer session data.
Last edited by dachew on Fri Aug 12, 2011 8:33 pm, edited 1 time in total.