SparkFun Forums

[fox_nl]

I am thinking about a nice project combining the power of an Atmega device and a CPLD. The prototype design would provide for all kinds of programming capabilities for testing / debugging. Hard- and software design of the prototype would not pose major problems, but in case this turns out to be "commercially" viable, I am at a loss.

The commercial board would not have all the programming (JTAG/ISP) capabilities. Therefore the Atmel and CPLD have to be pre-programmed before being soldered onto a PCB.

Can anyone give some pointers on how/where this is normally done?

[leon_heller]

I am thinking about a nice project combining the power of an Atmega device and a CPLD. The prototype design would provide for all kinds of programming capabilities for testing / debugging. Hard- and software design of the prototype would not pose major problems, but in case this turns out to be "commercially" viable, I am at a loss.

The commercial board would not have all the programming (JTAG/ISP) capabilities. Therefore the Atmel and CPLD have to be pre-programmed before being soldered onto a PCB.

Can anyone give some pointers on how/where this is normally done?

You could program the CPLD using the AVR. All you'd need is an ISP connector for the latter.

Leon

[fox_nl]

I have considered that option, however currently i'm trying to figure out solutions where neither ISP nor JTAG is available on the final board. This means that I would need a way to have the devices preprogrammed before they are soldered on to the PCB.

[phalanx]

I know for a fact that Microchip has a service where you send them your hex file and they will upload the code to them for you. I'm sure Atmel, Xilinx, and Altera have similar services.

It can't hurt to call them up and ask if they offer the service. Be prepared to have to order larger quantities of devices though.

Have you ever considered using a soft core in an FPGA? There are free 16F cores available for FPGAs which run at 1 instruction per clock up to the limit of the chip (commonly 500MHz). With a larger FPGA that still works with the free design tools, you could probably fit multiple cores inside all at once.

-Bill

[SOI_Sentinel]

I believe many commercial boards that are flash programmable are assembled then programmed. They don't use an ISP header. Instead, the critical lines get tossed out to pads here and there (wherever convienent for the board layout designer) and a robotic programmer comes about and uses gold plated spring loaded contacts to program the board. They're random enough to not be obvious or obtrusive. If you can figure out a way to make or get tubular spring contacts you could use this method. You'd need a little more hardware to program though (like a sliding vertical plate to hold the spring programmer assembly and a base mounted jig to align and hold the PCB).

[JonChandler]

From my experiences, it's a good idea to have some ability to program in circuit. Not that I would know anything about having boards assembled without the pre-programed parts actually being preprogramed! Most of *my* boards don't work so well when the code isn't loaded

This also supports future upgrades which might otherwise be too difficult or expensive.

[fox_nl]

I think I will go for the future upgrades (more likely: bugfixes) option by providing the JTAG / ISP connections without soldered header... I'm thinking about providing the stuff with some sort of "open source" license anyway.

Thanks so far!

[Philba]

any chip packge that has a "clip" can be programmed in circuit with out a header quite easily. for example, I do this for SOICs with a soic clip from pomona.