- Wed May 28, 2014 9:05 am
#171521
How is A/D conversion usually handled when using FPGAs?
It seems that with the potential for unclocked signals passing through the gates, high accuracy or high frequency signals could be compared or mixed, but with the thought I have in mind, the issue is getting analog signals "into" the array quickly without sample delays.
It seems that with the potential for unclocked signals passing through the gates, high accuracy or high frequency signals could be compared or mixed, but with the thought I have in mind, the issue is getting analog signals "into" the array quickly without sample delays.
Yes, I think strang... er, unconventionally.