SparkFun Forums

[reklipz]

The LT1940 datasheet suggest a layout similar to:


This is what I've come up with:


Will this work(as in, will it be producable)?

Is it even possible (for production using BatchPCB) to design a board for this part?

[phalanx]

So long as your clearances don't violate the production rules there is no reason why that board could not be made. What aspect of it has you concerned?

Also, what's up with the airwires at the bottom?

-Bill

[reklipz]

This is my first time ever designing a board, so I'm not sure how I can find out if the board meets spec.

The two pours (the left most and right most) are the power supplies, the airwires connect power to the other parts. I didn't bother connecting them if this part isnt "fabbable".

The grid is 6.25mil spacing, and I recall that BatchPCB has something like 7mil gap/7mil trace minimums, is that right? So at first glance, the chip as a whole has me concerned, as the gaps between pads for the LT1940 (the chip in question) doesn't even look fabbable.

Can you help me determine what I have to do to make this work? I know that that question is a little open ended in terms of what needs to be done, but thats exactly where I'm at right now, don't really know where to go / what exactly it is that I'm doing (there are some really weird angles in there, polygonal pours doing weird things, chip doesnt seem to be aligned perfectly to grid or something, because it's not perfectly symmetrical (it should be, with exception to the lone trace under the chip at the top)).

The above paragraph proves my point, about not really knowing what I'm doing, .

I really appreciate your help, as getting this single project under my belt is going to be a huge step forward.

-Nate

[jasonharper]

The LT1940 has pins on 0.65 mm centers (about 25.6 mil), with a recommended pad width of 0.45 mm (17.7 mil), thus leaving 0.2 mm (7.9 mil) spacing between pads. It is therefore just barely possible to fab this thru BatchPCB. I've made a couple of LT1940 boards via BatchPCB myself, back in the days when 8 mil was the minimum track/spacing so I had to fudge the pad width slightly.

The board image you posted shows about 2 grid lines per pin of the chip. Either your grid is actually set to something like 12.5 mil, or the chip footprint is off by a factor of 2 in all dimensions.

In any case, uploading the board to BatchPCB will quickly tell you whether it's fab-able or not.

[reklipz]

The board image you posted shows about 2 grid lines per pin of the chip. Either your grid is actually set to something like 12.5 mil, or the chip footprint is off by a factor of 2 in all dimensions.

Oh wow, you're right, was set to a multiple of 2, aka 12.5mil.

In any case, uploading the board to BatchPCB will quickly tell you whether it's fab-able or not.

I uploaded it, and it said there were no DRC errors, so looks like I'm in the clear. Awesome!