- Sat Jul 14, 2007 7:40 am
I make my own boards and I have a tendency to use Eagle's autorouter whenever I can. One way to get it to do what you want is to draw polygons on the tRestrict, bRestrict, and vRestrict layers. tRestrict and bRestrict will prevent eagle from allowing any traces on the top or bottom side of the board in that area. If you draw a rectangle on the tRestrict layer that completely surrounds your socket and its pads, eagle won't be able to connect anything to them so it will route to the pads on the bottom side of the board. For DIP sockets, you could do two rectangles, one surrounding each row of pins, with a gap in between. This would let eagle route a few traces down the center of the DIP chip on the top layer. I'm usually too lazy and just draw a big box around the whole thing. I use this trick for polarized headers, LEDs, electrolytics, anything I can't solder on the top.
Note that this will restrict some of the things you'd actually want eagle to be able to do, like route top layer traces across the DIP socket going between pins. It's usually not a problem for me.
I sometimes put a vRestrict around resistors & diodes to keep eagle from putting a via under them. Just as a matter of preference, I don't like having components sitting on top of my bumpy vias. It still lets eagle connect to the top or bottom side of the pins.
The restrict rectangles will cut holes in your power/gnd polygons if you use them. If this happens to you, get everything routed, save off a copy, then delete all of your restricts and run ratsnest to fill in the polygons.