Some questions met when designing PCBs

Questions relating to designing PCBs

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Betty99
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Joined: Mon Sep 19, 2016 11:52 pm

Some questions met when designing PCBs

Post by Betty99 » Mon Feb 13, 2017 2:59 am

I've designed a few PCB's now, but never put much thought into good practices. They were small boards and most of the emphasis was put into just making sure everything that needed to be connected was connected.

Now I want to get more serious into making well designed boards. I've designed and redesigned my current project multiple times trying to come up with a good looking layout.

This project is based around the ATXMega256 mCU running on a 16Mhz crystal, around 60 total components and 7 or 8 of them being IC's.

For my next redesign, I plan on giving "Manhattan Routing" a go to at least try and help with crazy traces going every which way - but that's a little bit off topic.

The problem I seem to run into the most is understanding an appropriate method of running power to each IC. Normally, I would just daisy chain them but that is said to be a bad practice.

Here are my questions relating to feeding power

I've heard of the "Star Configuration" where all the IC's tie directly into the regulator but haven't seen a real life example of that so I'm not sure how to design that into my projects. It sounds like a mess of traces coming off of one pad in my mind. Can you post an example of a well designed Star Configuration?

What would be some advantages and disadvantages of using the star configuration as opposed to a power plane, other than the obvious of power being everywhere with a plane.
When is it ok or not ok to use a plane for VCC, specifically for a 2 layer board as I've heard that it's not as common on a 2 layer board?
If I shouldn't use a power plane, which is better in the case of traces needing to cross each other: using via's for GPIO or via's for power?
If it is ok to use a power plane on a 2 layer board, should VCC be on the top layer or bottom, obviously I would have a Ground plane as well.
I know there isn't a win/win answer to these questions because every project is going to be different and require different planning, but I think the basic concept behind it should be somewhat universal that people follow. You have to know the rules before you can break them.

I also realize that these questions may be beyond the scope of online discussion, but I'm looking for more general answers that can help push me in the right direction.

tfkeel
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Re: Some questions met when designing PCBs

Post by tfkeel » Tue Feb 21, 2017 12:01 pm

I'll be happy to give a try.

In 46 years of my ee career, I have never seen a good example of "star" power configuration on a PCB. It is so "expensive" from the real-estate point of view that the only way to implement it is to add planes to the board. Once the idea of adding planes has been accepted, it is soon realized that continuous planes yield lower-impedance returns to the power node and also has the advantage of not impressing "offset" voltages on other circuits. And, you are correct, the power planes give you short connections available anywhere on the board.

You are also correct that every design deserves consideration on a specific basis, for the relative merits of available choices. When I design, I try to "prioritize" the merits of each paradigm choice - example, if I were designing an instrumentation amplifier or a low-noise audio amp, I might choose a "star" grounding scheme in the lowest-level stages (the stages which have the highest gain-to-output) while maintaining a more simplistic planar approach for succeeding stages.
I would then have my best-possible compromise between eating the real-estate and offset/decoupling.

It is not common to use a plane Vcc on a 2-layer board. The reason being that the low-impedance ground offers more circuit advantage, so if there is one side dedicated to a power plane, it's almost always the ground.

In RF circuitry, making the solder side of the board the ground plane offers the advantage of using coplanar waveguides for signal routing. This method is one of the best choices where field-containment is desirable. At frequencies below about 30 MHz there is no particular advantage to placing ground plane on either side.

In a choice between putting vias in power traces or GPIO, definitely putting them in the GPIOs is preferable. Via holes increase the impedance of the traces they get inserted in.

52midnight
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Re: Some questions met when designing PCBs

Post by 52midnight » Tue Jun 13, 2017 2:29 am

As a general comment I'll start with the most obvious: textbook theory and real-world practice are quite different. If you're dealing with frequencies under - say 20MHz or microcontroller territory - then forget all about "star configuration" and the rest of the nonsense. Just run the power and ground using thicker traces, BUT put a 10nF polycap at the top of EVERY logic DIP between +5V and 0V. That's always done the trick for me; it's DC with switching transients from the IC, so with the polycap IT'S JUST DC.

It gets trickier if you've got analogue on the same board. Stick to the same rule of a polycap per (opamp) IC, but the secret here is to isolate AGND and DGND - analogue ground and digital ground. Run all of the analogue ground traces to the common ground point, but use an inductor (one of the small 'resistor' types) to connect them. This will keep the digital switching transients out of the analogue return path, and so reduce noise.

Once you get above a few tens of MHz you're on your own.

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