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Open source ARM Debugger
By trfillos
#20259
Hello,

I have not managed yet to make my Amontec chameleon POD (as JTAG accelerator) communicate with a LPC2148 processor board (Embedded artists education board) and I would like to ask (more like beg) for your help!

First I tried to use the yagarto toolchain but as far as I could understand the executable openocd-pp.exe had no support for the jtag accelerator. So I uninstall it. Then I installed cygwin, downloaded the latest openocd svn (102) and build it with the jtag accelerator enabled (--enable-amtjtagaccel option), so far so good.

When I try to run the openocd I have the following error:

$ openocd -f accel.cfg
Info: openocd.c:82 main(): Open On-Chip Debugger (2006-09-07 20:00 CEST)
10489 [main] openocd 3400 _cygtls::handle_exceptions: Error while dumping state (probably corrupted stack)
Segmentation fault (core dumped)

How can I fix this? Please note that I have test it with and without the amontec parallel port drivers for the windows XP and I have the same result.

Also I have set the parallel port to 'EPP/ECP' at the bios. This is the only valid choice. The others are 'Bidirectional' and 'Standard'.

This is the configuration file I used:

#daemon configuration
telnet_port 4444
gdb_port 3333

#interface
interface amt_jtagaccel
parport_port 0x378
rtck enabled
jtag_speed 0

#use combined on interfaces or targets that can't set TRST/SRST separately
reset_config trst_and_srst srst_pulls_trst

#jtag scan chain
#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
jtag_device 4 0x1 0xf 0xe

#target configuration
#daemon_startup reset

#target <type> <startup mode>
#target arm7tdmi <reset mode> <chainpos> <endianness> <variant>
target arm7tdmi little run_and_init 0 arm7tdmi-s_r4
run_and_halt_time 0 30

working_area 0 0x40000000 0x8000 nobackup

#flash configuration
flash bank lpc2000 0x0 0x7d000 0 0 lpc2000_v2 0 12000 calc_checksum

Can someone tell me if something is wrong?

Also I have read that the jtag speed must be 1/6 of the current speed (12Mhz) of the processor (8Mhz/2^value). Is this correct? Now I am running at full speed. Should I set value to 2?

Thank you very much for your time.

Sincerely,
Triantafillos Paradas
By trfillos
#20266
OK, I am replying to myself...

I have just found that the crash comes from the 'rtck enabled' line of the configuration file I use. When I comment this out it works fine.

Since I have disabled the rtck option how can I use it? Do I use it by default maybe?

Thank you very much! If I find an answer I will post it...
By Dominic
#20271
Hi,

please live the RTCK featured disabled for now. The segfault results from the parallel port being accessed by the rtck command handler before access to the port was requested. I've moved that access to a later point, but that made all communication fail. I'll look at this tomorrow.

Setting the jtag_speed to 2 or 3 shouldn't affect performance and should allow you to work without problems, at least it's not going to make it worse than using the RTCK feature (which is safer, but also slower).

Regards,

Dominic
By trfillos
#20305
Hello there!

Now I have another problem... Please help because I don't know what else to do.

I can not halt the target processor. That's my problem!

I am starting openocd with the following configuration for the amontec jtag accelerator:


#For the Embedded Artists Educational board - LPC2148 based.
#daemon configuration
telnet_port 4444
gdb_port 3333

#interface
interface amt_jtagaccel
parport_port 0x378
#rtck enabled
jtag_speed 2

#use combined on interfaces or targets that can't set TRST/SRST separately
reset_config trst_and_srst srst_pulls_trst trst_push_pull srst_open_drain

#jtag scan chain
#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
jtag_device 4 0x1 0xf 0xe
#Onboard supervisor makes 200ms reset pulse so wait some more...
jtag_nsrst_delay 250
jtag_ntrst_delay 250

#target configuration, what to do on a target reset
#target arm7tdmi <reset mode> <chainpos> <endianness> <variant>
target arm7tdmi little run_and_init 0 arm7tdmi-s_r4
run_and_halt_time 0 250
daemon_startup reset

working_area 0 0x40000000 0x8000 nobackup

#flash configuration
flash bank lpc2000 0x0 0x7d000 0 0 lpc2000_v2 0 12000 calc_checksum


Please note that the LPC2148 processor flash is empty, so no programm is running except bootloader (I guess).

sometimes but not very often I am receiving the following error:
D:\>openocd -f accel.cfg
Info: openocd.c:82 main(): Open On-Chip Debugger (2006-09-07 20:00 CEST)
Warning: arm7_9_common.c:679 arm7_9_assert_reset(): srst resets test logic, too
Warning: jtag.c:1039 jtag_read_buffer(): value captured during scan didn't pass the requested check: captured: 0x00 check_value: 0x01 check_mask: 0x0f
Error: target.c:1055 handle_target(): couldn't poll target, exiting


I don't know why this happens but it doesn't matter that much because it is rare. Most of the times it starts normally, just with the warning 'srst resets.. .etc'.

I start a telnet client and I send a 'targets' command. I receive '0: arm7tdmi (little endian), state: running' which I guess is normal. Then I send a 'halt' command and a message says 'requesting target halt...'. Nothing else is reported to the telnet nor openocd console windows. As many times I tried to send 'halt' allways had the same behaviour. And of course every time when I 'poll' the targer it says 'target state: running'.

Anybody knows why this happens please? Is it something wrong with the configuration file I use?

Also, the user led of the Amontec chameleon pod (jtag accelerator) is always lit (on). I haven't ever noticed this led off (only during the pod programming). Is that normall?

Thank you very much for your time!

Regards,
Triantafillos
By AMONTEC
#20306
Hi Triantafillos,

Did you try to down the speed of the JTAG.

Best regards,
Laurent
By Dominic
#20308
A jtag_speed of 2 results in a TCK rate of 2.66MHz, which is too high for your LPC2000, sorry. Try a setting of 3 or 4 (3 works for me, but my board runs at 14.7456MHz).

Regards,

Dominic
By trfillos
#20325
Dominic:

My board has a 12Mhz crystal so a value of 2 results in a TCK rate of 2MHz, which I think it's ok for my LPC2148.

Dominic and Laurent:
I will try to reduce the speed and I will let you know.

Thank you very much for your help, both of you!

Best regards,
Triantafillos
By trfillos
#20330
Hello to all,

It looks like it is a TCK speed problem. With a value of 4 it works perfect (until now).

Thanks again. If I will need something more I will drop a post here!

Regarts,
Triantafillos
By AMONTEC
#20334
You could refere you to the datasheet of the JTAG Accelerator:
http://www.amontec.com/pub/amt_ann005.pdf
page 4.

The max frequency using TJAG Accelerator is 16Mhz !
Your speed 4 is corresponding to 1MHz.

Regards,
Laurent
By trfillos
#20339
Thanks for the tip Laurent.

When I tried a value of 3, halting the processor and then issuing a 'resume' command I had errors like:

D:\test\HelloWorld>openocd -f accel.cfg
Info: openocd.c:82 main(): Open On-Chip Debugger (2006-09-07 20:00 CEST)
Warning: arm7_9_common.c:679 arm7_9_assert_reset(): srst resets test logic, too
Info: server.c:67 add_connection(): accepted 'telnet' connection from 0
Warning: arm7_9_common.c:785 arm7_9_halt(): target was already halted
Warning: arm7_9_common.c:679 arm7_9_assert_reset(): srst resets test logic, too
Warning: jtag.c:1039 jtag_read_buffer(): value captured during scan didn't pass the requested check: captured: 0x00 check_value: 0x01 check_mask: 0x0f
Error: arm7_9_common.c:609 arm7_9_poll(): JTAG queue failed while reading EmbeddedICE status register

or

D:\test\HelloWorld>openocd -f accel.cfg
Info: openocd.c:82 main(): Open On-Chip Debugger (2006-09-07 20:00 CEST)
Warning: arm7_9_common.c:679 arm7_9_assert_reset(): srst resets test logic, too
Info: server.c:67 add_connection(): accepted 'telnet' connection from 0
Error: armv4_5.c:186 armv4_5_mode_to_number(): invalid mode value encountered
Error: arm7_9_common.c:947 arm7_9_debug_entry(): cpsr contains invalid mode value - communication failure
Error: target.c:1055 handle_target(): couldn't poll target, exiting

Maybe I have a cable length problem. I am using a parallel port extension cable which is about 2m. I will try to make a shorter cable, about 40cm. The chameleon pod jtag flat cable is that you are sending with the pod and its about 20cm (you know better).

Thank you very much.

Regards,
Triantafillos