OpenOCD can't perform 'reset halt' from tcl-script

Open source ARM Debugger

Moderator: phalanx

Post Reply
SashaSad
Posts: 1
Joined: Wed Oct 18, 2017 11:26 pm

OpenOCD can't perform 'reset halt' from tcl-script

Post by SashaSad » Thu Oct 19, 2017 4:24 am

Hello everybody, I’m quite newbie in openocd so I decided to seek for a help here.

I use olimex-arm-usb-tiny-h, Renesas MCU (RZ/A1) and in some cases it gets stuck. In order to avoid it I need to reset it every time when I communicate with it through openocd. I use Qt library and Qprocess class to run openocd in my application. Here is piece of code where I pass the parameters into openocd:

Code: Select all

// Search Directories
#ifdef Q_OS_WIN32
    args << "-s" << qApp->applicationDirPath();
#endif
	args << "-s" << m_workingDirectory->path();
	args << "-s" << m_workingDirectory->path() + "/" + platform;

	// Flash Script
	args << "-f" << "/target/rza1-swd.cfg";
	args << "-c" << "init";
	args << "-f" << "flash.tcl";
	args << "-c" << "shutdown";
In flash.tcl I have next code where I’m trying to reset MCU:

Code: Select all

proc target_reset {} {
	echo "Attempt to reset"	
	if {[catch [reset halt]]} {
		echo "Unable to reset target"
		return 1	
	}
	return 0	
}

# Halt target
echo_marker halt-started	
halt
wait_halt
rza1_init

# Load uboot-ocd
if {[target_reset] != 0} {
	echo_marker reloading-failed
	exit
}
echo_marker load-uboot-ocd-started
if {[flasher_upload $FLASHER_UBOOT_OCD_FILE_PATH $FLASHER_UBOOT_OCD_ADDR] != 0} {
	echo_marker load-uboot-ocd-failed
	exit
}
And here I have my problem, instead of resetting MCU the openocd process ends with error code:

Code: Select all

[2017-10-10 16:47:04.622] Open On-Chip Debugger 0.10.0
[2017-10-10 16:47:04.629] Licensed under GNU GPL v2
[2017-10-10 16:47:04.629] For bug reports, read
[2017-10-10 16:47:04.629] http://openocd.org/doc/doxygen/bugs.html
[2017-10-10 16:47:04.629] Info : FTDI SWD mode enabled
[2017-10-10 16:47:04.629] adapter speed: 10000 kHz
[2017-10-10 16:47:04.629] adapter_nsrst_assert_width: 100
[2017-10-10 16:47:04.629] adapter_nsrst_delay: 400
[2017-10-10 16:47:04.629] srst_only separate srst_nogate srst_open_drain connect_deassert_srst
[2017-10-10 16:47:04.629] rza1_init
[2017-10-10 16:47:04.640] Info : clock speed 10000 kHz
[2017-10-10 16:47:04.640] Info : SWD DPIDR 0x3ba02477
[2017-10-10 16:47:04.640] Info : rza1.cpu: hardware has 6 breakpoints, 4 watchpoints
[2017-10-10 16:47:04.682] Info : rza1.cpu rev 0, partnum c09, arch f, variant 3, implementor 41
[2017-10-10 16:47:04.682] Info : rza1.cpu cluster 0 core 0 multi core
[2017-10-10 16:47:04.682] Attempt to reset
[2017-10-10 16:47:04.772] in procedure 'target_reset' called at file "/tmp/TccFlasher-vItxO9/kmbt127/flash.tcl", line 53
[2017-10-10 16:47:04.772] in procedure 'reset' called at file "/tmp/TccFlasher-vItxO9/kmbt127/flash.tcl", line 34
[2017-10-10 16:47:04.772] in procedure 'ocd_bouncer'
[2017-10-10 16:47:04.772] 
[2017-10-10 16:47:04.772] 
[2017-10-10 16:47:04.773] OpenOCD ended with code 1
But if I run openocd and send “reset halt” command through the telnet everything is OK:

Code: Select all

Open On-Chip Debugger
> reset halt
in procedure 'reset' 
in procedure 'ocd_bouncer'

Polling target rza1.cpu failed, trying to reexamine
Could not initialize the debug port
Examination failed, GDB will be halted. Polling again in 100ms
Polling target rza1.cpu failed, trying to reexamine
Could not initialize the debug port
Examination failed, GDB will be halted. Polling again in 300ms
SWD DPIDR 0x3ba02477
Polling target rza1.cpu failed, trying to reexamine
rza1.cpu: hardware has 6 breakpoints, 4 watchpoints
Everything looks like handle_target function (http://openocd.org/doc-release/doxygen/ ... tml#l02441) in case of running commands from script doesn’t event start.
What’s wrong with my code? What should I do to reset and halt controller into tcl script? Perhaps solution is obvious, but due to lack of experience in openocd, I can’t solve the problem by myself.

Post Reply