LPC1517 Flashing with openocd

Open source ARM Debugger

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LPC1517 Flashing with openocd

Postby alcantor » Sun Aug 27, 2017 2:14 am

Hello Everyon,

I spend hours trying to flash an NXP LPC1517 microcontroller without success :cry: : . I need your advice!!!

I use an old RaspberryPi Model B as SWD programmer and the target device is an open source bluetooth OBDII adapter (see http://www.obddiag.net/images/allpro/AllProBT.pdf).

First of all, I've compiled the last OpenOCD version on the Raspberry Pi:

Code: Select all
sudo nano /etc/apt/sources.list # Remove comment on deb-src line...
sudo apt-get update
sudo apt-get build-dep openocd
git clone git://git.code.sf.net/p/openocd/code openocd
cd openocd
./configure --enable-bcm2835gpio --enable-sysfsgpio
sudo make install

Then I've wired my Raspberry Pi with my target (my-raspberrypi-native.cfg):

Code: Select all
interface bcm2835gpio
bcm2835gpio_peripheral_base 0x20000000
# Transition delay calculation: SPEED_COEFF/khz - SPEED_OFFSET
# These depend on system clock, calibrated for stock 700MHz
bcm2835gpio_speed_coeffs 113714 28
bcm2835gpio_jtag_nums 11 25 10 9
bcm2835gpio_swd_nums 11 25
bcm2835gpio_srst_num 24
reset_config srst_only srst_push_pull

And I'had to do something for the LPC1517 device:

Code: Select all
# NXP LPC1517 Cortex-M3 with 12kB of SRAM and 64 kB of Flash
set CHIPNAME     lpc1517;         # Chip Name
set CHIPSERIES   lpc1500;         # LPC15xx Series
set CHIPROMSIZE  0x00010000;      # 64 kB Flash
set CHIPROMOFF   0x00000000;      # Flash Start Address
set WORKAREASIZE 0x00002FF4;      # 12 kB SRAM - 32 bytes needed by the ROM Flash functions
set WORKAREAOFF  0x02000000;      # SRAM Start Address
set CCLK         12000;           # 12 MHz
set CPUTAPID     0x4ba00477;      # Cortex-M3 core
set TARGETNAME   $CHIPNAME.cpu;   # Target name
set FLASHNAME    $CHIPNAME.flash; # Flash name

transport select swd
source [find target/swj-dp.tcl]
swj_newdap $CHIPNAME cpu -irlen 4 -expected-id $CPUTAPID
target create $TARGETNAME cortex_m -chain-position $TARGETNAME
$TARGETNAME configure -work-area-phys $WORKAREAOFF -work-area-size $WORKAREASIZE
$TARGETNAME configure -event reset-init { mww 0x40074000 0x02 }
adapter_khz 100
cortex_m reset_config sysresetreq

So with the following command, I was trying to reprogrammed the chip:

Code: Select all
sudo openocd -f my-raspberrypi-native.cfg -f lpc1517.cfg &
telnet localhost 4444
#reset halt # reset halt does not configure SYSMEMREMAP
reset init
flash write_image erase unlock obdlpc15-bt.bin
verify_image obdlpc15-bt.bin
reset run

BUT I'am always facing this, when verifying the image:

Code: Select all
Error: checksum mismatch - attempting binary compare
diff 0 address 0x00000f4c. Was 0x00 instead of 0x42
diff 1 address 0x00000f4d. Was 0x00 instead of 0xf0
diff 2 address 0x00000f4e. Was 0x00 instead of 0x40
diff 3 address 0x00000f4f. Was 0x00 instead of 0x02
diff 4 address 0x00000f50. Was 0x00 instead of 0xc3
diff 5 address 0x00000f51. Was 0x00 instead of 0xf8
diff 6 address 0x00000f52. Was 0x00 instead of 0x08
diff 7 address 0x00000f53. Was 0x00 instead of 0x25
More than 128 errors, the rest are not printed.

Why??? Why the Flash is well done programmed from 0x0000000 to 0x00000f4c, but after only zeroes??

I've also try to "flash erase_sector 0 0 last" and "flash erase_check 0", all good. Erase operation works good, also after 0x00000f4c (I've readed 0xff values when erased).

Could it be an OpenOCD error, when transferring the Program to RAM before writing it?

PS: Flashing trough bootloader ISP, without OpenOCD is working, the whole Flash is also working. I've also flashed trough ISP and then verifying with OpenOCD, also working. Just the programming with OpenOCD get me crazy :doh:

Please help me :pray:
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Joined: Sun Aug 27, 2017 1:06 am

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