SparkFun Forums 

Where electronics enthusiasts find answers.

Open source ARM Debugger
By alcantor
#195964
Hello Everyon,

I spend hours trying to flash an NXP LPC1517 microcontroller without success :cry: : . I need your advice!!!

I use an old RaspberryPi Model B as SWD programmer and the target device is an open source bluetooth OBDII adapter (see http://www.obddiag.net/images/allpro/AllProBT.pdf).

First of all, I've compiled the last OpenOCD version on the Raspberry Pi:
Code: Select all
sudo nano /etc/apt/sources.list # Remove comment on deb-src line...
sudo apt-get update
sudo apt-get build-dep openocd
git clone git://git.code.sf.net/p/openocd/code openocd
cd openocd
./bootstrap
./configure --enable-bcm2835gpio --enable-sysfsgpio
make
sudo make install
Then I've wired my Raspberry Pi with my target (my-raspberrypi-native.cfg):
Code: Select all
interface bcm2835gpio
bcm2835gpio_peripheral_base 0x20000000
# Transition delay calculation: SPEED_COEFF/khz - SPEED_OFFSET
# These depend on system clock, calibrated for stock 700MHz
bcm2835gpio_speed_coeffs 113714 28
bcm2835gpio_jtag_nums 11 25 10 9
bcm2835gpio_swd_nums 11 25
bcm2835gpio_srst_num 24
reset_config srst_only srst_push_pull
And I'had to do something for the LPC1517 device:
Code: Select all
# NXP LPC1517 Cortex-M3 with 12kB of SRAM and 64 kB of Flash
set CHIPNAME     lpc1517;         # Chip Name
set CHIPSERIES   lpc1500;         # LPC15xx Series
set CHIPROMSIZE  0x00010000;      # 64 kB Flash
set CHIPROMOFF   0x00000000;      # Flash Start Address
set WORKAREASIZE 0x00002FF4;      # 12 kB SRAM - 32 bytes needed by the ROM Flash functions
set WORKAREAOFF  0x02000000;      # SRAM Start Address
set CCLK         12000;           # 12 MHz
set CPUTAPID     0x4ba00477;      # Cortex-M3 core
set TARGETNAME   $CHIPNAME.cpu;   # Target name
set FLASHNAME    $CHIPNAME.flash; # Flash name

transport select swd
source [find target/swj-dp.tcl]
swj_newdap $CHIPNAME cpu -irlen 4 -expected-id $CPUTAPID
target create $TARGETNAME cortex_m -chain-position $TARGETNAME
$TARGETNAME configure -work-area-phys $WORKAREAOFF -work-area-size $WORKAREASIZE
flash bank $FLASHNAME lpc2000 $CHIPROMOFF $CHIPROMSIZE 0 0 $TARGETNAME $CHIPSERIES $CCLK calc_checksum
$TARGETNAME configure -event reset-init { mww 0x40074000 0x02 }
adapter_khz 100
cortex_m reset_config sysresetreq
So with the following command, I was trying to reprogrammed the chip:
Code: Select all
sudo openocd -f my-raspberrypi-native.cfg -f lpc1517.cfg &
telnet localhost 4444
#reset halt # reset halt does not configure SYSMEMREMAP
reset init
flash write_image erase unlock obdlpc15-bt.bin
verify_image obdlpc15-bt.bin
reset run
exit
BUT I'am always facing this, when verifying the image:
Code: Select all
Error: checksum mismatch - attempting binary compare
diff 0 address 0x00000f4c. Was 0x00 instead of 0x42
diff 1 address 0x00000f4d. Was 0x00 instead of 0xf0
diff 2 address 0x00000f4e. Was 0x00 instead of 0x40
diff 3 address 0x00000f4f. Was 0x00 instead of 0x02
diff 4 address 0x00000f50. Was 0x00 instead of 0xc3
diff 5 address 0x00000f51. Was 0x00 instead of 0xf8
diff 6 address 0x00000f52. Was 0x00 instead of 0x08
diff 7 address 0x00000f53. Was 0x00 instead of 0x25
.... 
More than 128 errors, the rest are not printed.
Why??? Why the Flash is well done programmed from 0x0000000 to 0x00000f4c, but after only zeroes??

I've also try to "flash erase_sector 0 0 last" and "flash erase_check 0", all good. Erase operation works good, also after 0x00000f4c (I've readed 0xff values when erased).

Could it be an OpenOCD error, when transferring the Program to RAM before writing it?

PS: Flashing trough bootloader ISP, without OpenOCD is working, the whole Flash is also working. I've also flashed trough ISP and then verifying with OpenOCD, also working. Just the programming with OpenOCD get me crazy :doh:

Please help me :pray:
By Kaks
#197048
I'm back to my project and did some google search and now there is someone with same problem.

I have exactly same problem with my lpc1517 boards I have made. It's not all zeroes to end of flash but 0x00000f4c - 0x00000ffe. 0x00001000 is healthy again.
I played around with openocd configs and source - days but didn't find anything. It took honestly few days to realize the flash wasn't okay. Weird faults. Then running patiently debugger throught functions suddenly a gap of zeroes appears in disassembly viewer.
Tried to erase - well it's successful because it's all zeros anyway! It's how successful erase is measured.
Tried to write with some openocd write command stuff but in that range the 1bit won't just stick to. Every time read is 0.

I didn't bother to isp flash it because following:

But my lpc1519 embedded artists dev board works just perfect with exactly same openocd config. It could get me thru part of developing and then I figure out what I do with my own board. There should not be differences in flash implementation between these chips?

Lesson: Turn on verify functions for flash - I don't yet know how.

I use lpcxpresso + eclipse openocd < via ip > Open On-Chip Debugger 0.10.0-dev-00249-gb6c4a5d-dirty (2016-04-08-00:25) + J-LINK

What codes do you have in your chip alcantor?
By alcantor
#197056
I'm glad to hear that I'm not alone;-) I was hopeless.
Tried to erase - well it's successful because it's all zeros anyway!
On my side I'm getting all ones (0xFF), which is pretty normal for a NAND Flash... Or it is a NOR Flash?

I'am trying to load the official firmware of my device (https://github.com/ObdDiag-Net/allpro). Or did you mean somethings else with "codes"? Is there a way to get the version of the microcode of the chip? Or to upgrade it?

I've dig a lot in openocd and didn't find any glue yet. Because the RAM is smaller, I've doubted some overflow issues... At some point it calls the same intern chip function as the ISP does.
By Kaks
#197059
Sure you can read part id, rev id, bootloader version and serial number. I thought about checking date codes etc. from actual chip top markings.
UM10736.pdf page 40 and 71 defines what addresses directly give part id and rev id.

Example values for LPC1519 dev board read from memmory browser in my IDE
address - value - notes
0x400743F8 - 0x00001549 - Part ID for 1549
0x400743FC - 0x10419D6C - Which is not default revision by user manual - 0x0841 9D6C. Bootloader or die has been changed after user manual revision.

I will read my lpc1517 board later but I really want to get going with my lpc1519 board now.

Edit: Reading serial number is easier with ISP commands I can't find simple way to produce serial number within debugging session.
By alcantor
#197061
Sorry :oops: , that are my codes on my chip:

LPC1517J
10 04
ZSD16
452A

I will read the REVID, a soon as get my rpi ready.
By Kaks
#197067
My lpc chip markings:
LPC1517JBD64
S63501.1 08
ZSD13522A

LPC1517JBD64
S63501.1 08
ZSD13522A

All are the same.
What debugger probe do you use alcantor?
By alcantor
#197158
Kaks wrote: Mon Nov 27, 2017 10:50 am Example values for LPC1519 dev board read from memmory browser in my IDE
address - value - notes
0x400743F8 - 0x00001549 - Part ID for 1549
0x400743FC - 0x10419D6C - Which is not default revision by user manual - 0x0841 9D6C. Bootloader or die has been changed after user manual revision.
I've the same revision as you have for your LPC1549

> mdw 0x400743F8
0x400743f8: 00001517
> mdw 0x400743FC
0x400743fc: 10419d6c
>

---

Today I've tried again and I had a different behavior, maybe it could be a glue.

1. First I've retried to program the target with openocd and SRST -> Failed at 0xf4c
2. Then with openocd without SRST -> Not working at all
3. After that I've reprogrammed trough ISP (with a Bluetooh Serial Connection) with FlashMagic http://www.flashmagictool.com/
4. Then with openocd without SRST -> 100% Working

Are you using the SRST Signal or only SWDIO and SWCLK?

PS: FlashMagic seems to program backward. Last sector first and first sector last.
By Kaks
#197168
I have reset pin connected in my desings and IIRC it's pulled up on board and connected to debugger too via cortex connector in all my boards. I don't know if anything at all happens with that reset pin. Reset pin is complete mystery to me in terms of debugging. I think in cortex chips debugger resets target with SWD.

Okay do isp flash to all zero at 3. and then try 4. so there is surelly no program residue in flash hole?

I recommend you to get lpc1549 board for dev purposes then isp ready-ish code to final application board.
http://www.embeddedartists.com/products ... 49_xpr.php