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I have AT91R40008 cpu and start OpenOCD with next parameters:

openocd-pp.exe -f at91r40008_pp.cfg -d -l OpenOCD.log

During connection cpu one time reseted.
I obtain log from OpenOCD:

Debug: jtag.c:1209 jtag_init():
Debug: parport.c:373 parport_init(): requesting privileges for parallel port 0x378...
Debug: parport.c:383 parport_init(): ...privileges granted
Debug: parport.c:210 parport_reset(): trst: 0, srst: 0
Debug: jtag.c:247 jtag_call_event_callbacks(): jtag event: 1
Debug: jtag.c:1095 jtag_reset_callback():
Debug: jtag.c:247 jtag_call_event_callbacks(): jtag event: 1
Debug: jtag.c:1095 jtag_reset_callback():
Debug: openocd.c:98 main(): jtag init complete
Debug: arm7_9_common.c:655 arm7_9_assert_reset(): target->state: unknown
Debug: jtag.c:247 jtag_call_event_callbacks(): jtag event: 0
Debug: jtag.c:1095 jtag_reset_callback():
Debug: jtag.c:247 jtag_call_event_callbacks(): jtag event: 1
Debug: jtag.c:1095 jtag_reset_callback():
Warning: arm7_9_common.c:679 arm7_9_assert_reset(): srst resets test logic, too
Debug: jtag.c:247 jtag_call_event_callbacks(): jtag event: 0
Debug: jtag.c:1095 jtag_reset_callback():
Debug: jtag.c:247 jtag_call_event_callbacks(): jtag event: 1
Debug: jtag.c:1095 jtag_reset_callback():
Debug: parport.c:210 parport_reset(): trst: 0, srst: 1
Debug: parport.c:210 parport_reset(): trst: 0, srst: 1
Debug: arm7_9_common.c:718 arm7_9_deassert_reset(): target->state: reset
Debug: jtag.c:247 jtag_call_event_callbacks(): jtag event: 2
Debug: jtag.c:1095 jtag_reset_callback():
Debug: parport.c:210 parport_reset(): trst: 0, srst: 0
Debug: openocd.c:102 main(): target init complete
Debug: openocd.c:106 main(): flash init complete
Debug: gdb_server.c:1115 gdb_init(): gdb service for target arm7tdmi at port 3333
Debug: embeddedice.c:156 embeddedice_read_reg_w_check(): 1
Debug: jtag.c:247 jtag_call_event_callbacks(): jtag event: 3
Debug: jtag.c:1095 jtag_reset_callback():
Debug: arm7_9_common.c:781 arm7_9_halt(): target->state: running
Debug: embeddedice.c:252 embeddedice_write_reg(): 9: 0xffffffff
Debug: embeddedice.c:252 embeddedice_write_reg(): 11: 0xffffffff
Debug: embeddedice.c:252 embeddedice_write_reg(): 12: 0x00000100
Debug: embeddedice.c:252 embeddedice_write_reg(): 13: 0x000000f7
Debug: embeddedice.c:156 embeddedice_read_reg_w_check(): 1
Debug: arm7_9_common.c:619 arm7_9_poll(): DBGACK set, dbg_state->value: 0x9
Debug: embeddedice.c:252 embeddedice_write_reg(): 0: 0x00000005
Debug: embeddedice.c:252 embeddedice_write_reg(): 12: 0x00000000
Debug: arm7_9_common.c:919 arm7_9_debug_entry(): target entered debug from ARM state
Debug: arm7_9_common.c:938 arm7_9_debug_entry(): target entered debug state in Supervisor mode
Debug: arm7_9_common.c:974 arm7_9_debug_entry(): r0: 0x00000000
Debug: arm7_9_common.c:974 arm7_9_debug_entry(): r1: 0x00000000
Debug: arm7_9_common.c:974 arm7_9_debug_entry(): r2: 0x000000ff
Debug: arm7_9_common.c:974 arm7_9_debug_entry(): r3: 0x00000000
Debug: arm7_9_common.c:974 arm7_9_debug_entry(): r4: 0x00000010
Debug: arm7_9_common.c:974 arm7_9_debug_entry(): r5: 0x00014408
Debug: arm7_9_common.c:974 arm7_9_debug_entry(): r6: 0xffffffff
Debug: arm7_9_common.c:974 arm7_9_debug_entry(): r7: 0x000138a8
Debug: arm7_9_common.c:974 arm7_9_debug_entry(): r8: 0x00019630
Debug: arm7_9_common.c:974 arm7_9_debug_entry(): r9: 0x00000000
Debug: arm7_9_common.c:974 arm7_9_debug_entry(): r10: 0xffffffff
Debug: arm7_9_common.c:974 arm7_9_debug_entry(): r11: 0xffffffff
Debug: arm7_9_common.c:974 arm7_9_debug_entry(): r12: 0x0001ad58
Debug: arm7_9_common.c:974 arm7_9_debug_entry(): r13: 0x0001ad0c
Debug: arm7_9_common.c:974 arm7_9_debug_entry(): r14: 0x0000b254
Debug: arm7_9_common.c:974 arm7_9_debug_entry(): r15: 0x0000b260
Debug: arm7_9_common.c:980 arm7_9_debug_entry(): entered debug state at PC 0xb260
Debug: target.c:442 target_call_event_callbacks(): target event 0

On board I have external WatchDog that reset cpu after 1.6 seconds.
Impression that OpenOCD connect to cpu and halt it than disabled interrupt and after 1.6 seconds WatchDog reset cpu.

Can I connect to cpu without halt it ?