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Open source ARM Debugger
By areyes
#184147
Hello!

I am trying to debug code on the raspberry pi 2 using openocd and JTAG. I have 2 different JTAG connectors. Segger Jlink and the FTDI minimodule 2232H. Both have run into the same problem. I am running Openocd version 0.9.0 on Ubuntu 12.04. I run openocd with the following command:
Code: Select all
sudo openocd -f interface/jlink.cfg -f jtag.cfg
or
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sudo openocd -f interface/ftdi/minimodule.cfg -f jtag.cfg
here is the contents of jtag.cfg:
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# Broadcom 2836 on Raspberry Pi 2

telnet_port 4444
gdb_port 3333

adapter_khz 1000
adapter_nsrst_delay 400
reset_config none

if { [info exists CHIPNAME] } {
  set  _CHIPNAME $CHIPNAME
} else {
  set  _CHIPNAME rpi2
}

if { [info exists DAP_TAPID] } {
  set _DAP_TAPID $DAP_TAPID
} else {
  set _DAP_TAPID 0x4ba00477
}

jtag newtap $_CHIPNAME dap -expected-id $_DAP_TAPID -irlen 4 -ircapture 0x01 -irmask 0x0f

set _TARGETNAME0 $_CHIPNAME.cpu0
set _TARGETNAME1 $_CHIPNAME.cpu1
set _TARGETNAME2 $_CHIPNAME.cpu2
set _TARGETNAME3 $_CHIPNAME.cpu3

target create $_TARGETNAME0 cortex_a -chain-position $_CHIPNAME.dap -coreid 0 -dbgbase 0x80010000
target create $_TARGETNAME1 cortex_a -chain-position $_CHIPNAME.dap -coreid 1 -dbgbase 0x80012000
target create $_TARGETNAME2 cortex_a -chain-position $_CHIPNAME.dap -coreid 2 -dbgbase 0x80014000
target create $_TARGETNAME3 cortex_a -chain-position $_CHIPNAME.dap -coreid 3 -dbgbase 0x80016000

target smp $_TARGETNAME0 $_TARGETNAME1 $_TARGETNAME2 $_TARGETNAME3
my problem is that once i telnet into the openocd session and halt the cores, i cannot single step. my commands are as follows:
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$ telnet localhost 4444
Trying 127.0.0.1...
Connected to localhost.
Escape character is '^]'.
Open On-Chip Debugger
> targets
    TargetName         Type       Endian TapName            State       
--  ------------------ ---------- ------ ------------------ ------------
 0  rpi2.cpu0          cortex_a   little rpi2.dap           running
 1  rpi2.cpu1          cortex_a   little rpi2.dap           running
 2  rpi2.cpu2          cortex_a   little rpi2.dap           running
 3* rpi2.cpu3          cortex_a   little rpi2.dap           running
> halt
ttbcr 0ttbr0 db5fdb7bttbr1 cff07f5b
rpi2.cpu3 rev 5, partnum c07, arch f, variant 0, implementor 41
number of cache level 2
cache l2 present :not supported
rpi2.cpu3 cluster f core 3 multi core
target state: halted
target halted in ARM state due to debug-request, current mode: Supervisor
cpsr: 0x600001d3 pc: 0x000000c4
MMU: disabled, D-Cache: disabled, I-Cache: disabled
ttbcr 0ttbr0 7e6ef642ttbr1 7fef3fa9
rpi2.cpu0 rev 5, partnum c07, arch f, variant 0, implementor 41
number of cache level 2
cache l2 present :not supported
rpi2.cpu0 cluster f core 0 multi core
target state: halted
target halted in ARM state due to debug-request, current mode: Supervisor
cpsr: 0x800001d3 pc: 0x00008234
MMU: disabled, D-Cache: disabled, I-Cache: disabled
ttbcr 0ttbr0 ebf7bf71ttbr1 fbfe7ff0
rpi2.cpu1 rev 5, partnum c07, arch f, variant 0, implementor 41
number of cache level 2
cache l2 present :not supported
rpi2.cpu1 cluster f core 1 multi core
target state: halted
target halted in ARM state due to debug-request, current mode: Supervisor
cpsr: 0x600001d3 pc: 0x000000c4
MMU: disabled, D-Cache: disabled, I-Cache: disabled
ttbcr 0ttbr0 ffffef79ttbr1 5cf67ff1
rpi2.cpu2 rev 5, partnum c07, arch f, variant 0, implementor 41
number of cache level 2
cache l2 present :not supported
rpi2.cpu2 cluster f core 2 multi core
target state: halted
target halted in ARM state due to debug-request, current mode: Supervisor
cpsr: 0x600001d3 pc: 0x000000c4
MMU: disabled, D-Cache: disabled, I-Cache: disabled
> cortex_a smp_gdb 0
gdb coreid  3 -> 0
> resume 
target state: halted
target halted in ARM state due to debug-request, current mode: Supervisor
cpsr: 0x800001d3 pc: 0x00008234
MMU: disabled, D-Cache: disabled, I-Cache: disabled
> step
target state: halted
target halted in ARM state due to debug-request, current mode: Supervisor
cpsr: 0x800001d3 pc: 0x00008234
MMU: disabled, D-Cache: disabled, I-Cache: disabled
> step
target state: halted
target halted in ARM state due to debug-request, current mode: Supervisor
cpsr: 0x800001d3 pc: 0x00008234
MMU: disabled, D-Cache: disabled, I-Cache: disabled
the core 0 has the code i wrote running on it and i am trying to use a gdb session to debug it eventually but can't even get openocd to step the processor through each instruction. is there something i am missing here? if i put the cores in a running state, then i can't single step them.