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Open source ARM Debugger
By Boris85
#18036
Hello

I found that the program flow is different when running the OpenOCD in single step mode.

When using the single step in Thumb mode, the CPU does not take care about the CPSR flags. It executes the conditional jumps as unconditional ones.

Here is an example.

The code in C is

// ----------------------------

volatile int iTestCnt1 = 0;

void TestCounter( void )
{
int j;
for( j = 0; j < 4; j++ )
{
iTestCnt1 += 5;
}
}

// ----------------------------

The disassembly from the GDB is

0x2007df8 <TestCounter>: movs r2, #0
0x2007dfa <TestCounter+2>: ldr r1, [pc, #16] (0x2007e0c <TestCounter+20>)
0x2007dfc <TestCounter+4>: ldr r3, [r1, #0]
0x2007dfe <TestCounter+6>: adds r3, #5
0x2007e00 <TestCounter+8>: str r3, [r1, #0]
0x2007e02 <TestCounter+10>: adds r2, #1
0x2007e04 <TestCounter+12>: cmp r2, #4
0x2007e06 <TestCounter+14>: bne.n 0x2007dfc <TestCounter+4>
0x2007e08 <TestCounter+16>: bx lr
0x2007e0a <TestCounter+18>: lsls r0, r0, #0
0x2007e0c <TestCounter+20>: lsls r4, r0, #10
0x2007e0e <TestCounter+22>: lsls r1, r0, #8


The loop has to add 5 to the iTestCnt1 four times then the function ends.

When using the single step (si command in the GDB) the CPU always executes
the "bne.n" conditional jump as unconditional "b". I saw the "j" variable incrementing
above 4. But when i restarted the program and set the breakpoint on the "bx lr" instruction,
the program executed correctly.
This happens only in Thumb mode when using OpenOCD (2006-08-17 from SVN) I tested it with
Wiggler and ARM-USB-JTAG.
The single step works correctly with original OCDRemote and MultiICE-GDB-Server.
By Bool
#18264
Hi Boris,

which chip are You using?

I have similar problem with LPC2000 family. In thumb mode CPU does not take care about the CPSR flags and branch works bad during single step.
By Dominic
#18265
Hi,

sorry I didn't notice this thread earlier. I'll look into the CPSR handling during Thumb mode. Thanks for your observations.

Regards,

Dominic
By Dominic
#18321
I've committed a fix for this problem in SVN revision 93. I've tested it on a LPC2000 (ARM7TDMI), but the changes are rather small, so it should work for ARM9, too.

Actually, the problem wasn't restricted to single-stepping. The OpenOCD used Thumb instructions that updated the flags, therefor corrupting the condition flags (NZCV) of the CPSR on every debug entry and exit. Anyway, the problem should be solved now, and debugging of Thumb code should work.

Regards,

Dominic
By Boris85
#18338
Thanks a lot. It works. I tested the OpenOCD rev 93 on STR710 and on AT91M63200.