OpenOCD 0.6.1 + gdb + Linux using STM32F4Discovery

OpenOCD 0.6.1 + gdb + Linux using STM32F4Discovery#169336

By guihashimoto - Thu Mar 13, 2014 12:18 pm

- Thu Mar 13, 2014 12:18 pm #169336

Hello all,

I am currently debugging two boards: the STM32VLDiscovery and the STM32F4Discovery boards.

When I use the OpenOCD+gdb+gcc combo with the VL board, everything runs fine.

However, when I do it with the STM32F4, I get a couple of errors:

- Writing to the flash is sometimes tricky, as the same command may or may not work. I perform a reset halt followed by a flash write_image erase main.elf. I usually have to restart OpenOCD one or two times befor I can get the program to flash.

- However, what worries me the most is that when the program is eventually written to the flash, the pc does not start where it should. Instead, the program goes staright into a HardFault. If I forcefully set the pc to the correct memory position, I can get the program to run, but since a hardfault was ocurred, the program does not run as it should.

If anyone has any insights about what might be going on, I'd be very grateful!

Re: OpenOCD 0.6.1 + gdb + Linux using STM32F4Discovery#169344

By ntfreak - Thu Mar 13, 2014 1:55 pm

- Thu Mar 13, 2014 1:55 pm #169344

The best suggestion i can give is to update your version of OpenOCD - 0.6.1 is very old.

Spen

Re: OpenOCD 0.6.1 + gdb + Linux using STM32F4Discovery#169347

By guihashimoto - Thu Mar 13, 2014 2:39 pm

- Thu Mar 13, 2014 2:39 pm #169347

Thanks Spen,

I have updated to 0.7 and 0.8 to, but my hard fault problem still persists.

However this time around. when I step the program, the connection between gdb and openocd is closed and openocd prints the following:

accepting 'gdb' connection from 3333
target state: halted
target halted due to debug-request, current mode: Thread
xPSR: 00000000 pc: 0x08002080 msp: 0x20020000
(this is where I request a step on gdb)
gdb requested a non-existing register
dropped 'gdb' connection

I am currently using gdb 7.3.

Is there a combination of openocd and gdb that is known to work well for the F4Discovery board?

Re: OpenOCD 0.6.1 + gdb + Linux using STM32F4Discovery#169348

By ntfreak - Thu Mar 13, 2014 4:39 pm

- Thu Mar 13, 2014 4:39 pm #169348

When you say 0.8, do you mean built from the master branch on sourceforge?

At the moment I would recommend using the master branch as it is quite stable. That version of gdb should work fine, can you enable the debug log and post the output?

Code: Select all

openocd -d3 ...

Spen

Re: OpenOCD 0.6.1 + gdb + Linux using STM32F4Discovery#169375

By guihashimoto - Fri Mar 14, 2014 5:30 am

- Fri Mar 14, 2014 5:30 am #169375

yes, I compiled the latest version available on your git

even without using gdb, if I use openocd to flash the memory and perform a single step instruction, I am led to a hardfault:

Code: Select all

guihashimoto@invslave:~/Desktop/vldiscovery/projects/headcon$ openocd -d3 -f openocd.cfg
Open On-Chip Debugger 0.8.0-dev-00381-gf91390f (2014-03-13-17:38)
Licensed under GNU GPL v2
For bug reports, read
	http://openocd.sourceforge.net/doc/doxygen/bugs.html
User : 13 2 command.c:546 command_print(): debug_level: 3
Debug: 14 2 options.c:98 add_default_dirs(): bindir=/usr/local/bin
Debug: 15 2 options.c:99 add_default_dirs(): pkgdatadir=/usr/local/share/openocd
Debug: 16 2 options.c:100 add_default_dirs(): run_prefix=
Debug: 17 2 configuration.c:44 add_script_search_dir(): adding /home/guihashimoto/.openocd
Debug: 18 3 configuration.c:44 add_script_search_dir(): adding /usr/local/share/openocd/site
Debug: 19 3 configuration.c:44 add_script_search_dir(): adding /usr/local/share/openocd/scripts
Debug: 20 3 configuration.c:84 find_file(): found openocd.cfg
Debug: 21 3 configuration.c:84 find_file(): found /usr/local/share/openocd/scripts/interface/stlink-v2.cfg
Debug: 22 3 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_interface hla
Debug: 23 3 command.c:145 script_debug(): command - interface ocd_interface hla
Debug: 25 3 command.c:366 register_command_handler(): registering 'ocd_hla_device_desc'...
Debug: 26 3 command.c:366 register_command_handler(): registering 'ocd_hla_serial'...
Debug: 27 3 command.c:366 register_command_handler(): registering 'ocd_hla_layout'...
Debug: 28 4 command.c:366 register_command_handler(): registering 'ocd_hla_vid_pid'...
Debug: 29 4 command.c:366 register_command_handler(): registering 'ocd_trace'...
Debug: 30 4 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_hla_layout stlink
Debug: 31 4 command.c:145 script_debug(): command - hla_layout ocd_hla_layout stlink
Debug: 33 4 hla_interface.c:176 hl_interface_handle_layout_command(): hl_interface_handle_layout_command
Debug: 34 4 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_hla_device_desc ST-LINK/V2
Debug: 35 4 command.c:145 script_debug(): command - hla_device_desc ocd_hla_device_desc ST-LINK/V2
Debug: 37 4 hla_interface.c:150 hl_interface_handle_device_desc_command(): hl_interface_handle_device_desc_command
Debug: 38 4 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_hla_vid_pid 0x0483 0x3748
Debug: 39 4 command.c:145 script_debug(): command - hla_vid_pid ocd_hla_vid_pid 0x0483 0x3748
Debug: 41 5 hla_interface.c:204 hl_interface_handle_vid_pid_command(): hl_interface_handle_vid_pid_command
Debug: 42 5 configuration.c:84 find_file(): found /usr/local/share/openocd/scripts/target/stm32f4x_stlink.cfg
Debug: 43 5 configuration.c:84 find_file(): found /usr/local/share/openocd/scripts/target/stm32_stlink.cfg
Debug: 44 5 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_transport select hla_swd
Debug: 45 5 command.c:145 script_debug(): command - ocd_transport ocd_transport select hla_swd
Debug: 46 5 hla_transport.c:187 hl_transport_select(): hl_transport_select
Debug: 47 5 command.c:366 register_command_handler(): registering 'ocd_hla'...
Debug: 48 5 command.c:366 register_command_handler(): registering 'ocd_jtag'...
Debug: 49 5 command.c:366 register_command_handler(): registering 'ocd_jtag'...
Debug: 50 6 command.c:366 register_command_handler(): registering 'ocd_jtag'...
Debug: 51 6 command.c:366 register_command_handler(): registering 'ocd_jtag'...
Debug: 52 6 command.c:366 register_command_handler(): registering 'ocd_jtag'...
Debug: 53 6 command.c:366 register_command_handler(): registering 'ocd_jtag'...
Debug: 54 6 command.c:366 register_command_handler(): registering 'ocd_jtag'...
Debug: 55 6 command.c:366 register_command_handler(): registering 'ocd_jtag'...
Debug: 56 6 command.c:366 register_command_handler(): registering 'ocd_jtag'...
Debug: 57 6 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_hla newtap stm32f4x cpu -expected-id 0x2ba01477
Debug: 58 6 command.c:145 script_debug(): command - ocd_hla ocd_hla newtap stm32f4x cpu -expected-id 0x2ba01477
Debug: 59 6 hla_tcl.c:104 jim_hl_newtap_cmd(): Creating New Tap, Chip: stm32f4x, Tap: cpu, Dotted: stm32f4x.cpu, 2 params
Debug: 60 6 hla_tcl.c:114 jim_hl_newtap_cmd(): Processing option: -expected-id
Debug: 61 6 core.c:1319 jtag_tap_init(): Created Tap: stm32f4x.cpu @ abs position 0, irlen 0, capture: 0x0 mask: 0x0
Debug: 62 6 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_target create stm32f4x.cpu hla_target -chain-position stm32f4x.cpu
Debug: 63 7 command.c:145 script_debug(): command - ocd_target ocd_target create stm32f4x.cpu hla_target -chain-position stm32f4x.cpu
Debug: 64 7 target.c:1718 target_free_all_working_areas_restore(): freeing all working areas
Debug: 65 7 command.c:366 register_command_handler(): registering 'ocd_arm'...
Debug: 66 7 command.c:366 register_command_handler(): registering 'ocd_arm'...
Debug: 67 7 command.c:366 register_command_handler(): registering 'ocd_arm'...
Debug: 68 7 command.c:366 register_command_handler(): registering 'ocd_arm'...
Debug: 69 7 command.c:366 register_command_handler(): registering 'ocd_arm'...
Debug: 70 7 command.c:366 register_command_handler(): registering 'ocd_arm'...
Debug: 71 7 hla_target.c:367 adapter_target_create(): adapter_target_create
Debug: 72 7 hla_target.c:338 adapter_init_arch_info(): adapter_init_arch_info
Debug: 73 7 command.c:366 register_command_handler(): registering 'ocd_stm32f4x.cpu'...
Debug: 74 7 command.c:366 register_command_handler(): registering 'ocd_stm32f4x.cpu'...
Debug: 75 7 command.c:366 register_command_handler(): registering 'ocd_stm32f4x.cpu'...
Debug: 76 7 command.c:366 register_command_handler(): registering 'ocd_stm32f4x.cpu'...
Debug: 77 7 command.c:366 register_command_handler(): registering 'ocd_stm32f4x.cpu'...
Debug: 78 7 command.c:366 register_command_handler(): registering 'ocd_stm32f4x.cpu'...
Debug: 79 7 command.c:366 register_command_handler(): registering 'ocd_stm32f4x.cpu'...
Debug: 80 7 command.c:366 register_command_handler(): registering 'ocd_stm32f4x.cpu'...
Debug: 81 7 command.c:366 register_command_handler(): registering 'ocd_stm32f4x.cpu'...
Debug: 82 7 command.c:366 register_command_handler(): registering 'ocd_stm32f4x.cpu'...
Debug: 83 7 command.c:366 register_command_handler(): registering 'ocd_stm32f4x.cpu'...
Debug: 84 7 command.c:366 register_command_handler(): registering 'ocd_stm32f4x.cpu'...
Debug: 85 7 command.c:366 register_command_handler(): registering 'ocd_stm32f4x.cpu'...
Debug: 86 7 command.c:366 register_command_handler(): registering 'ocd_stm32f4x.cpu'...
Debug: 87 7 command.c:366 register_command_handler(): registering 'ocd_stm32f4x.cpu'...
Debug: 88 7 command.c:366 register_command_handler(): registering 'ocd_stm32f4x.cpu'...
Debug: 89 7 command.c:366 register_command_handler(): registering 'ocd_stm32f4x.cpu'...
Debug: 90 7 command.c:366 register_command_handler(): registering 'ocd_stm32f4x.cpu'...
Debug: 91 7 command.c:366 register_command_handler(): registering 'ocd_stm32f4x.cpu'...
Debug: 92 7 command.c:366 register_command_handler(): registering 'ocd_stm32f4x.cpu'...
Debug: 93 7 command.c:366 register_command_handler(): registering 'ocd_stm32f4x.cpu'...
Debug: 94 7 command.c:366 register_command_handler(): registering 'ocd_stm32f4x.cpu'...
Debug: 95 7 command.c:366 register_command_handler(): registering 'ocd_stm32f4x.cpu'...
Debug: 96 7 command.c:366 register_command_handler(): registering 'ocd_stm32f4x.cpu'...
Debug: 97 7 command.c:366 register_command_handler(): registering 'ocd_stm32f4x.cpu'...
Debug: 98 7 command.c:366 register_command_handler(): registering 'ocd_stm32f4x.cpu'...
Debug: 99 7 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_stm32f4x.cpu configure -work-area-phys 0x20000000 -work-area-size 0x10000 -work-area-backup 0
Debug: 100 7 command.c:145 script_debug(): command - ocd_stm32f4x.cpu ocd_stm32f4x.cpu configure -work-area-phys 0x20000000 -work-area-size 0x10000 -work-area-backup 0
Debug: 101 7 target.c:1718 target_free_all_working_areas_restore(): freeing all working areas
Debug: 102 7 target.c:1718 target_free_all_working_areas_restore(): freeing all working areas
Debug: 103 7 target.c:1718 target_free_all_working_areas_restore(): freeing all working areas
Debug: 104 7 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_flash bank stm32f4x.flash stm32f2x 0 0 0 0 stm32f4x.cpu
Debug: 105 7 command.c:145 script_debug(): command - ocd_flash ocd_flash bank stm32f4x.flash stm32f2x 0 0 0 0 stm32f4x.cpu
Debug: 107 7 command.c:366 register_command_handler(): registering 'ocd_stm32f2x'...
Debug: 108 7 command.c:366 register_command_handler(): registering 'ocd_stm32f2x'...
Debug: 109 7 command.c:366 register_command_handler(): registering 'ocd_stm32f2x'...
Debug: 110 7 tcl.c:807 handle_flash_bank_command(): 'stm32f2x' driver usage field missing
User : 111 7 command.c:691 command_run_line(): write_mainUser : 112 7 command.c:693 command_run_line(): 
Debug: 113 8 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_init
Debug: 114 8 command.c:145 script_debug(): command - init ocd_init
Debug: 116 8 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_target init
Debug: 117 8 command.c:145 script_debug(): command - ocd_target ocd_target init
Debug: 119 8 target.c:1281 handle_target_init_command(): Initializing targets...
Debug: 120 8 hla_target.c:357 adapter_init_target(): adapter_init_target
Debug: 121 8 command.c:366 register_command_handler(): registering 'ocd_target_request'...
Debug: 122 8 command.c:401 register_command(): command 'trace' is already registered in '<global>' context
Debug: 123 8 command.c:366 register_command_handler(): registering 'ocd_trace'...
Debug: 124 8 command.c:366 register_command_handler(): registering 'ocd_trace'...
Debug: 125 8 command.c:366 register_command_handler(): registering 'ocd_fast_load_image'...
Debug: 126 8 command.c:366 register_command_handler(): registering 'ocd_fast_load'...
Debug: 127 8 command.c:366 register_command_handler(): registering 'ocd_profile'...
Debug: 128 8 command.c:366 register_command_handler(): registering 'ocd_virt2phys'...
Debug: 129 8 command.c:366 register_command_handler(): registering 'ocd_reg'...
Debug: 130 8 command.c:366 register_command_handler(): registering 'ocd_poll'...
Debug: 131 8 command.c:366 register_command_handler(): registering 'ocd_wait_halt'...
Debug: 132 8 command.c:366 register_command_handler(): registering 'ocd_halt'...
Debug: 133 8 command.c:366 register_command_handler(): registering 'ocd_resume'...
Debug: 134 8 command.c:366 register_command_handler(): registering 'ocd_reset'...
Debug: 135 8 command.c:366 register_command_handler(): registering 'ocd_soft_reset_halt'...
Debug: 136 8 command.c:366 register_command_handler(): registering 'ocd_step'...
Debug: 137 8 command.c:366 register_command_handler(): registering 'ocd_mdw'...
Debug: 138 8 command.c:366 register_command_handler(): registering 'ocd_mdh'...
Debug: 139 8 command.c:366 register_command_handler(): registering 'ocd_mdb'...
Debug: 140 8 command.c:366 register_command_handler(): registering 'ocd_mww'...
Debug: 141 8 command.c:366 register_command_handler(): registering 'ocd_mwh'...
Debug: 142 8 command.c:366 register_command_handler(): registering 'ocd_mwb'...
Debug: 143 8 command.c:366 register_command_handler(): registering 'ocd_bp'...
Debug: 144 8 command.c:366 register_command_handler(): registering 'ocd_rbp'...
Debug: 145 8 command.c:366 register_command_handler(): registering 'ocd_wp'...
Debug: 146 8 command.c:366 register_command_handler(): registering 'ocd_rwp'...
Debug: 147 8 command.c:366 register_command_handler(): registering 'ocd_load_image'...
Debug: 148 8 command.c:366 register_command_handler(): registering 'ocd_dump_image'...
Debug: 149 8 command.c:366 register_command_handler(): registering 'ocd_verify_image'...
Debug: 150 8 command.c:366 register_command_handler(): registering 'ocd_test_image'...
Debug: 151 8 command.c:366 register_command_handler(): registering 'ocd_reset_nag'...
Debug: 152 8 command.c:366 register_command_handler(): registering 'ocd_ps'...
Debug: 153 8 command.c:366 register_command_handler(): registering 'ocd_test_mem_access'...
Debug: 154 8 hla_interface.c:108 hl_interface_init(): hl_interface_init
Debug: 155 8 hla_layout.c:85 hl_layout_init(): hl_layout_init
Info : 156 8 core.c:1371 adapter_init(): This adapter doesn't support configurable speed
Debug: 157 8 openocd.c:132 handle_init_command(): Debug Adapter init complete
Debug: 158 8 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_transport init
Debug: 159 8 command.c:145 script_debug(): command - ocd_transport ocd_transport init
Debug: 161 8 transport.c:240 handle_transport_init(): handle_transport_init
Debug: 162 8 hla_transport.c:148 hl_transport_init(): hl_transport_init
Debug: 163 8 hla_transport.c:165 hl_transport_init(): current transport hla_swd
Debug: 164 8 hla_interface.c:44 hl_interface_open(): hl_interface_open
Debug: 165 8 hla_layout.c:42 hl_layout_open(): hl_layout_open
Debug: 166 8 stlink_usb.c:1559 stlink_usb_open(): stlink_usb_open
Debug: 167 8 stlink_usb.c:1574 stlink_usb_open(): transport: 1 vid: 0x0483 pid: 0x3748
Info : 168 19 stlink_usb.c:454 stlink_usb_version(): STLINK v2 JTAG v14 API v2 SWIM v0 VID 0x0483 PID 0x3748
Info : 169 19 stlink_usb.c:1671 stlink_usb_open(): using stlink api v2
Debug: 170 20 stlink_usb.c:622 stlink_usb_init_mode(): MODE: 0x02
Info : 171 25 stlink_usb.c:486 stlink_usb_check_voltage(): Target voltage: 2.875206
Debug: 172 25 stlink_usb.c:677 stlink_usb_init_mode(): MODE: 0x01
Debug: 173 29 stlink_usb.c:716 stlink_usb_init_mode(): MODE: 0x02
Debug: 174 33 stlink_usb.c:1710 stlink_usb_open(): Using TAR autoincrement: 4096
Debug: 175 33 hla_interface.c:129 hl_interface_execute_queue(): hl_interface_execute_queue: ignored
Debug: 176 33 core.c:717 jtag_add_reset(): SRST line released
Debug: 177 33 core.c:741 jtag_add_reset(): TRST line released
Debug: 178 33 core.c:321 jtag_call_event_callbacks(): jtag event: TAP reset
Debug: 179 33 hla_interface.c:69 hl_interface_init_target(): hl_interface_init_target
Debug: 180 35 stlink_usb.c:741 stlink_usb_idcode(): IDCODE: 0x2BA01477
Debug: 181 35 openocd.c:145 handle_init_command(): Examining targets...
Debug: 182 35 target.c:1397 target_call_event_callbacks(): target event 21 (examine-start)
Debug: 183 35 hla_target.c:766 adapter_read_memory(): adapter_read_memory 0xe000ed00 4 1
Debug: 184 39 target.c:2060 target_read_u32(): address: 0xe000ed00, value: 0x410fc241
Debug: 185 39 cortex_m.c:1804 cortex_m_examine(): Cortex-M4 r0p1 processor detected
Debug: 186 39 cortex_m.c:1805 cortex_m_examine(): cpuid: 0x410fc241
Debug: 187 39 hla_target.c:766 adapter_read_memory(): adapter_read_memory 0xe000ef40 4 1
Debug: 188 43 target.c:2060 target_read_u32(): address: 0xe000ef40, value: 0x10110021
Debug: 189 43 hla_target.c:766 adapter_read_memory(): adapter_read_memory 0xe000ef44 4 1
Debug: 190 47 target.c:2060 target_read_u32(): address: 0xe000ef44, value: 0x11000011
Debug: 191 47 cortex_m.c:1813 cortex_m_examine(): Cortex-M4 floating point feature FPv4_SP found
Debug: 192 47 hla_target.c:766 adapter_read_memory(): adapter_read_memory 0xe0002000 4 1
Debug: 193 51 target.c:2060 target_read_u32(): address: 0xe0002000, value: 0x00000260
Debug: 194 51 target.c:2148 target_write_u32(): address: 0xe0002008, value: 0x00000000
Debug: 195 51 hla_target.c:780 adapter_write_memory(): adapter_write_memory 0xe0002008 4 1
Debug: 196 58 target.c:2148 target_write_u32(): address: 0xe000200c, value: 0x00000000
Debug: 197 58 hla_target.c:780 adapter_write_memory(): adapter_write_memory 0xe000200c 4 1
Debug: 198 61 target.c:2148 target_write_u32(): address: 0xe0002010, value: 0x00000000
Debug: 199 61 hla_target.c:780 adapter_write_memory(): adapter_write_memory 0xe0002010 4 1
Debug: 200 64 target.c:2148 target_write_u32(): address: 0xe0002014, value: 0x00000000
Debug: 201 64 hla_target.c:780 adapter_write_memory(): adapter_write_memory 0xe0002014 4 1
Debug: 202 68 target.c:2148 target_write_u32(): address: 0xe0002018, value: 0x00000000
Debug: 203 68 hla_target.c:780 adapter_write_memory(): adapter_write_memory 0xe0002018 4 1
Debug: 204 72 target.c:2148 target_write_u32(): address: 0xe000201c, value: 0x00000000
Debug: 205 72 hla_target.c:780 adapter_write_memory(): adapter_write_memory 0xe000201c 4 1
Debug: 206 76 target.c:2148 target_write_u32(): address: 0xe0002020, value: 0x00000000
Debug: 207 76 hla_target.c:780 adapter_write_memory(): adapter_write_memory 0xe0002020 4 1
Debug: 208 80 target.c:2148 target_write_u32(): address: 0xe0002024, value: 0x00000000
Debug: 209 80 hla_target.c:780 adapter_write_memory(): adapter_write_memory 0xe0002024 4 1
Debug: 210 84 cortex_m.c:1850 cortex_m_examine(): FPB fpcr 0x260, numcode 6, numlit 2
Debug: 211 84 hla_target.c:766 adapter_read_memory(): adapter_read_memory 0xe0001000 4 1
Debug: 212 89 target.c:2060 target_read_u32(): address: 0xe0001000, value: 0x40000000
Debug: 213 89 target.c:2148 target_write_u32(): address: 0xe0001028, value: 0x00000000
Debug: 214 89 hla_target.c:780 adapter_write_memory(): adapter_write_memory 0xe0001028 4 1
Debug: 215 93 target.c:2148 target_write_u32(): address: 0xe0001038, value: 0x00000000
Debug: 216 93 hla_target.c:780 adapter_write_memory(): adapter_write_memory 0xe0001038 4 1
Debug: 217 97 target.c:2148 target_write_u32(): address: 0xe0001048, value: 0x00000000
Debug: 218 97 hla_target.c:780 adapter_write_memory(): adapter_write_memory 0xe0001048 4 1
Debug: 219 101 target.c:2148 target_write_u32(): address: 0xe0001058, value: 0x00000000
Debug: 220 101 hla_target.c:780 adapter_write_memory(): adapter_write_memory 0xe0001058 4 1
Debug: 221 105 cortex_m.c:1761 cortex_m_dwt_setup(): DWT dwtcr 0x40000000, comp 4, watch/trigger
Info : 222 105 cortex_m.c:1859 cortex_m_examine(): stm32f4x.cpu: hardware has 6 breakpoints, 4 watchpoints
Debug: 223 105 target.c:1397 target_call_event_callbacks(): target event 22 (examine-end)
Debug: 224 105 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_flash init
Debug: 225 105 command.c:145 script_debug(): command - ocd_flash ocd_flash init
Debug: 226 107 hla_target.c:766 adapter_read_memory(): adapter_read_memory 0xe000edf8 4 1
Debug: 227 111 target.c:2060 target_read_u32(): address: 0xe000edf8, value: 0x00000000
Debug: 228 111 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
Debug: 229 113 hla_target.c:75 adapter_load_core_reg_u32(): load from core reg 0  value 0x0
Debug: 230 113 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
Debug: 231 115 hla_target.c:75 adapter_load_core_reg_u32(): load from core reg 1  value 0x0
Debug: 232 115 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
Debug: 233 117 hla_target.c:75 adapter_load_core_reg_u32(): load from core reg 2  value 0x0
Debug: 234 117 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
Debug: 235 119 hla_target.c:75 adapter_load_core_reg_u32(): load from core reg 3  value 0x0
Debug: 236 119 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
Debug: 237 123 hla_target.c:75 adapter_load_core_reg_u32(): load from core reg 4  value 0x0
Debug: 238 123 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
Debug: 239 125 hla_target.c:75 adapter_load_core_reg_u32(): load from core reg 5  value 0x0
Debug: 240 125 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
Debug: 241 127 hla_target.c:75 adapter_load_core_reg_u32(): load from core reg 6  value 0x0
Debug: 242 127 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
Debug: 243 129 hla_target.c:75 adapter_load_core_reg_u32(): load from core reg 7  value 0x0
Debug: 244 129 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
Debug: 245 131 hla_target.c:75 adapter_load_core_reg_u32(): load from core reg 8  value 0x0
Debug: 246 131 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
Debug: 247 133 hla_target.c:75 adapter_load_core_reg_u32(): load from core reg 9  value 0x0
Debug: 248 133 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
Debug: 249 135 hla_target.c:75 adapter_load_core_reg_u32(): load from core reg 10  value 0x0
Debug: 250 135 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
Debug: 251 137 hla_target.c:75 adapter_load_core_reg_u32(): load from core reg 11  value 0x0
Debug: 252 137 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
Debug: 253 139 hla_target.c:75 adapter_load_core_reg_u32(): load from core reg 12  value 0x0
Debug: 254 139 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
Debug: 255 141 hla_target.c:75 adapter_load_core_reg_u32(): load from core reg 13  value 0x2001ffe0
Debug: 256 141 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
Debug: 257 143 hla_target.c:75 adapter_load_core_reg_u32(): load from core reg 14  value 0xfffffff9
Debug: 258 143 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
Debug: 259 145 hla_target.c:75 adapter_load_core_reg_u32(): load from core reg 15  value 0x8001c1c
Debug: 260 145 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
Debug: 261 147 hla_target.c:75 adapter_load_core_reg_u32(): load from core reg 16  value 0x1000003
Debug: 262 147 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
Debug: 263 149 hla_target.c:75 adapter_load_core_reg_u32(): load from core reg 17  value 0x2001ffe0
Debug: 264 149 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
Debug: 265 151 hla_target.c:75 adapter_load_core_reg_u32(): load from core reg 18  value 0x0
Debug: 266 151 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
Debug: 267 155 hla_target.c:140 adapter_load_core_reg_u32(): load from special reg 19 value 0x0
Debug: 268 155 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
Debug: 269 157 hla_target.c:140 adapter_load_core_reg_u32(): load from special reg 20 value 0x0
Debug: 270 157 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
Debug: 271 159 hla_target.c:140 adapter_load_core_reg_u32(): load from special reg 21 value 0x0
Debug: 272 159 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
Debug: 273 161 hla_target.c:140 adapter_load_core_reg_u32(): load from special reg 22 value 0x0
Debug: 274 164 hla_target.c:447 adapter_debug_entry(): entered debug state in core mode: Handler at PC 0x08001c1c, target->state: halted
Debug: 275 164 target.c:1397 target_call_event_callbacks(): target event 0 (gdb-halt)
Debug: 276 164 target.c:1397 target_call_event_callbacks(): target event 1 (halted)
Debug: 277 164 hla_target.c:486 adapter_poll(): halted: PC: 0x08001c1c
Debug: 279 164 tcl.c:873 handle_flash_init_command(): Initializing flash devices...
Debug: 280 164 command.c:366 register_command_handler(): registering 'ocd_flash'...
Debug: 281 164 command.c:366 register_command_handler(): registering 'ocd_flash'...
Debug: 282 165 command.c:366 register_command_handler(): registering 'ocd_flash'...
Debug: 283 165 command.c:366 register_command_handler(): registering 'ocd_flash'...
Debug: 284 165 command.c:366 register_command_handler(): registering 'ocd_flash'...
Debug: 285 165 command.c:366 register_command_handler(): registering 'ocd_flash'...
Debug: 286 165 command.c:366 register_command_handler(): registering 'ocd_flash'...
Debug: 287 165 command.c:366 register_command_handler(): registering 'ocd_flash'...
Debug: 288 165 command.c:366 register_command_handler(): registering 'ocd_flash'...
Debug: 289 165 command.c:366 register_command_handler(): registering 'ocd_flash'...
Debug: 290 165 command.c:366 register_command_handler(): registering 'ocd_flash'...
Debug: 291 165 command.c:366 register_command_handler(): registering 'ocd_flash'...
Debug: 292 165 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_mflash init
Debug: 293 165 command.c:145 script_debug(): command - ocd_mflash ocd_mflash init
Debug: 295 166 mflash.c:1379 handle_mflash_init_command(): Initializing mflash devices...
Debug: 296 166 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_nand init
Debug: 297 166 command.c:145 script_debug(): command - ocd_nand ocd_nand init
Debug: 299 168 tcl.c:497 handle_nand_init_command(): Initializing NAND devices...
Debug: 300 168 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_pld init
Debug: 301 168 command.c:145 script_debug(): command - ocd_pld ocd_pld init
Debug: 303 170 pld.c:207 handle_pld_init_command(): Initializing PLDs...
Info : 304 27913 server.c:83 add_connection(): accepting 'telnet' connection from 4444
Debug: 305 31182 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_reset halt
Debug: 306 31182 command.c:145 script_debug(): command - reset ocd_reset halt
Debug: 308 31185 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_target names
Debug: 309 31185 command.c:145 script_debug(): command - ocd_target ocd_target names
Debug: 310 31185 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_stm32f4x.cpu invoke-event reset-start
Debug: 311 31185 command.c:145 script_debug(): command - ocd_stm32f4x.cpu ocd_stm32f4x.cpu invoke-event reset-start
Debug: 312 31185 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_jtag arp_init-reset
Debug: 313 31185 command.c:145 script_debug(): command - ocd_jtag ocd_jtag arp_init-reset
Debug: 315 31185 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_stm32f4x.cpu cget -chain-position
Debug: 316 31186 command.c:145 script_debug(): command - ocd_stm32f4x.cpu ocd_stm32f4x.cpu cget -chain-position
Debug: 317 31186 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_jtag tapisenabled stm32f4x.cpu
Debug: 318 31186 command.c:145 script_debug(): command - ocd_jtag ocd_jtag tapisenabled stm32f4x.cpu
Debug: 319 31186 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_stm32f4x.cpu invoke-event examine-start
Debug: 320 31186 command.c:145 script_debug(): command - ocd_stm32f4x.cpu ocd_stm32f4x.cpu invoke-event examine-start
Debug: 321 31186 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_stm32f4x.cpu arp_examine
Debug: 322 31186 command.c:145 script_debug(): command - ocd_stm32f4x.cpu ocd_stm32f4x.cpu arp_examine
Debug: 323 31186 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_stm32f4x.cpu invoke-event examine-end
Debug: 324 31186 command.c:145 script_debug(): command - ocd_stm32f4x.cpu ocd_stm32f4x.cpu invoke-event examine-end
Debug: 325 31186 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_stm32f4x.cpu invoke-event reset-assert-pre
Debug: 326 31186 command.c:145 script_debug(): command - ocd_stm32f4x.cpu ocd_stm32f4x.cpu invoke-event reset-assert-pre
Debug: 327 31186 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_stm32f4x.cpu cget -chain-position
Debug: 328 31186 command.c:145 script_debug(): command - ocd_stm32f4x.cpu ocd_stm32f4x.cpu cget -chain-position
Debug: 329 31186 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_jtag tapisenabled stm32f4x.cpu
Debug: 330 31186 command.c:145 script_debug(): command - ocd_jtag ocd_jtag tapisenabled stm32f4x.cpu
Debug: 331 31186 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_stm32f4x.cpu arp_reset assert 1
Debug: 332 31186 command.c:145 script_debug(): command - ocd_stm32f4x.cpu ocd_stm32f4x.cpu arp_reset assert 1
Debug: 333 31186 target.c:1718 target_free_all_working_areas_restore(): freeing all working areas
Debug: 334 31186 hla_target.c:499 adapter_assert_reset(): adapter_assert_reset
Debug: 335 31195 stlink_usb.c:909 stlink_usb_reset(): RESET: 0x00000080
Debug: 336 31195 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_stm32f4x.cpu invoke-event reset-assert-post
Debug: 337 31195 command.c:145 script_debug(): command - ocd_stm32f4x.cpu ocd_stm32f4x.cpu invoke-event reset-assert-post
Debug: 338 31195 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_stm32f4x.cpu invoke-event reset-deassert-pre
Debug: 339 31195 command.c:145 script_debug(): command - ocd_stm32f4x.cpu ocd_stm32f4x.cpu invoke-event reset-deassert-pre
Debug: 340 31195 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_stm32f4x.cpu cget -chain-position
Debug: 341 31195 command.c:145 script_debug(): command - ocd_stm32f4x.cpu ocd_stm32f4x.cpu cget -chain-position
Debug: 342 31195 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_jtag tapisenabled stm32f4x.cpu
Debug: 343 31195 command.c:145 script_debug(): command - ocd_jtag ocd_jtag tapisenabled stm32f4x.cpu
Debug: 344 31195 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_stm32f4x.cpu arp_reset deassert 1
Debug: 345 31195 command.c:145 script_debug(): command - ocd_stm32f4x.cpu ocd_stm32f4x.cpu arp_reset deassert 1
Debug: 346 31195 target.c:1718 target_free_all_working_areas_restore(): freeing all working areas
Debug: 347 31195 hla_target.c:562 adapter_deassert_reset(): adapter_deassert_reset
Debug: 348 31195 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_stm32f4x.cpu invoke-event reset-deassert-post
Debug: 349 31195 command.c:145 script_debug(): command - ocd_stm32f4x.cpu ocd_stm32f4x.cpu invoke-event reset-deassert-post
Debug: 350 31195 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_stm32f4x.cpu cget -chain-position
Debug: 351 31196 command.c:145 script_debug(): command - ocd_stm32f4x.cpu ocd_stm32f4x.cpu cget -chain-position
Debug: 352 31196 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_jtag tapisenabled stm32f4x.cpu
Debug: 353 31196 command.c:145 script_debug(): command - ocd_jtag ocd_jtag tapisenabled stm32f4x.cpu
Debug: 354 31196 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_stm32f4x.cpu arp_waitstate halted 1000
Debug: 355 31196 command.c:145 script_debug(): command - ocd_stm32f4x.cpu ocd_stm32f4x.cpu arp_waitstate halted 1000
Debug: 356 31197 hla_target.c:766 adapter_read_memory(): adapter_read_memory 0xe000edf8 4 1
Debug: 357 31201 target.c:2060 target_read_u32(): address: 0xe000edf8, value: 0x00000000
Debug: 358 31201 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
Debug: 359 31203 hla_target.c:75 adapter_load_core_reg_u32(): load from core reg 0  value 0x0
Debug: 360 31203 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
Debug: 361 31205 hla_target.c:75 adapter_load_core_reg_u32(): load from core reg 1  value 0x0
Debug: 362 31205 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
Debug: 363 31207 hla_target.c:75 adapter_load_core_reg_u32(): load from core reg 2  value 0x0
Debug: 364 31207 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
Debug: 365 31210 hla_target.c:75 adapter_load_core_reg_u32(): load from core reg 3  value 0x0
Debug: 366 31210 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
Debug: 367 31215 hla_target.c:75 adapter_load_core_reg_u32(): load from core reg 4  value 0x0
Debug: 368 31215 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
Debug: 369 31217 hla_target.c:75 adapter_load_core_reg_u32(): load from core reg 5  value 0x0
Debug: 370 31217 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
Debug: 371 31219 hla_target.c:75 adapter_load_core_reg_u32(): load from core reg 6  value 0x0
Debug: 372 31219 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
Debug: 373 31224 hla_target.c:75 adapter_load_core_reg_u32(): load from core reg 7  value 0x0
Debug: 374 31224 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
Debug: 375 31226 hla_target.c:75 adapter_load_core_reg_u32(): load from core reg 8  value 0x0
Debug: 376 31226 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
Debug: 377 31228 hla_target.c:75 adapter_load_core_reg_u32(): load from core reg 9  value 0x0
Debug: 378 31228 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
Debug: 379 31230 hla_target.c:75 adapter_load_core_reg_u32(): load from core reg 10  value 0x0
Debug: 380 31230 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
Debug: 381 31232 hla_target.c:75 adapter_load_core_reg_u32(): load from core reg 11  value 0x0
Debug: 382 31232 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
Debug: 383 31234 hla_target.c:75 adapter_load_core_reg_u32(): load from core reg 12  value 0x0
Debug: 384 31234 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
Debug: 385 31236 hla_target.c:75 adapter_load_core_reg_u32(): load from core reg 13  value 0x20020000
Debug: 386 31236 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
Debug: 387 31242 hla_target.c:75 adapter_load_core_reg_u32(): load from core reg 14  value 0xffffffff
Debug: 388 31242 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
Debug: 389 31244 hla_target.c:75 adapter_load_core_reg_u32(): load from core reg 15  value 0x8002080
Debug: 390 31244 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
Debug: 391 31246 hla_target.c:75 adapter_load_core_reg_u32(): load from core reg 16  value 0x0
Debug: 392 31246 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
Debug: 393 31248 hla_target.c:75 adapter_load_core_reg_u32(): load from core reg 17  value 0x20020000
Debug: 394 31248 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
Debug: 395 31250 hla_target.c:75 adapter_load_core_reg_u32(): load from core reg 18  value 0x0
Debug: 396 31250 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
Debug: 397 31252 hla_target.c:140 adapter_load_core_reg_u32(): load from special reg 19 value 0x0
Debug: 398 31252 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
Debug: 399 31254 hla_target.c:140 adapter_load_core_reg_u32(): load from special reg 20 value 0x0
Debug: 400 31254 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
Debug: 401 31256 hla_target.c:140 adapter_load_core_reg_u32(): load from special reg 21 value 0x0
Debug: 402 31256 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
Debug: 403 31258 hla_target.c:140 adapter_load_core_reg_u32(): load from special reg 22 value 0x0
Debug: 404 31260 hla_target.c:447 adapter_debug_entry(): entered debug state in core mode: Thread at PC 0x08002080, target->state: halted
Debug: 405 31260 target.c:1397 target_call_event_callbacks(): target event 0 (gdb-halt)
Debug: 406 31260 target.c:1397 target_call_event_callbacks(): target event 1 (halted)
User : 407 31260 target.c:1770 target_arch_state(): target state: halted
User : 408 31260 armv7m.c:501 armv7m_arch_state(): target halted due to debug-request, current mode: Thread 
xPSR: 00000000 pc: 0x08002080 msp: 0x20020000
Debug: 409 31260 hla_target.c:486 adapter_poll(): halted: PC: 0x08002080
Debug: 410 31260 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_stm32f4x.cpu curstate
Debug: 411 31260 command.c:145 script_debug(): command - ocd_stm32f4x.cpu ocd_stm32f4x.cpu curstate
Debug: 412 31260 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_stm32f4x.cpu invoke-event reset-end
Debug: 413 31260 command.c:145 script_debug(): command - ocd_stm32f4x.cpu ocd_stm32f4x.cpu invoke-event reset-end
Debug: 414 32526 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_step
Debug: 415 32526 command.c:145 script_debug(): command - step ocd_step
Debug: 417 32529 target.c:2702 handle_step_command(): -
Debug: 418 32529 hla_target.c:703 adapter_step(): adapter_step
Debug: 419 32529 armv7m.c:127 armv7m_restore_context():  
Debug: 420 32529 target.c:2148 target_write_u32(): address: 0xe000edf8, value: 0x00000000
Debug: 421 32529 hla_target.c:780 adapter_write_memory(): adapter_write_memory 0xe000edf8 4 1
Debug: 422 32533 target.c:1397 target_call_event_callbacks(): target event 2 (resumed)
Debug: 423 32541 hla_target.c:766 adapter_read_memory(): adapter_read_memory 0xe000edf8 4 1
Debug: 424 32545 target.c:2060 target_read_u32(): address: 0xe000edf8, value: 0x00000000
Debug: 425 32545 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
Debug: 426 32547 hla_target.c:75 adapter_load_core_reg_u32(): load from core reg 0  value 0x0
Debug: 427 32547 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
Debug: 428 32549 hla_target.c:75 adapter_load_core_reg_u32(): load from core reg 1  value 0x0
Debug: 429 32549 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
Debug: 430 32552 hla_target.c:75 adapter_load_core_reg_u32(): load from core reg 2  value 0x0
Debug: 431 32552 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
Debug: 432 32554 hla_target.c:75 adapter_load_core_reg_u32(): load from core reg 3  value 0x0
Debug: 433 32554 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
Debug: 434 32556 hla_target.c:75 adapter_load_core_reg_u32(): load from core reg 4  value 0x0
Debug: 435 32556 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
Debug: 436 32558 hla_target.c:75 adapter_load_core_reg_u32(): load from core reg 5  value 0x0
Debug: 437 32558 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
Debug: 438 32560 hla_target.c:75 adapter_load_core_reg_u32(): load from core reg 6  value 0x0
Debug: 439 32560 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
Debug: 440 32562 hla_target.c:75 adapter_load_core_reg_u32(): load from core reg 7  value 0x0
Debug: 441 32562 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
Debug: 442 32564 hla_target.c:75 adapter_load_core_reg_u32(): load from core reg 8  value 0x0
Debug: 443 32564 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
Debug: 444 32566 hla_target.c:75 adapter_load_core_reg_u32(): load from core reg 9  value 0x0
Debug: 445 32566 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
Debug: 446 32568 hla_target.c:75 adapter_load_core_reg_u32(): load from core reg 10  value 0x0
Debug: 447 32568 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
Debug: 448 32570 hla_target.c:75 adapter_load_core_reg_u32(): load from core reg 11  value 0x0
Debug: 449 32570 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
Debug: 450 32572 hla_target.c:75 adapter_load_core_reg_u32(): load from core reg 12  value 0x0
Debug: 451 32572 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
Debug: 452 32574 hla_target.c:75 adapter_load_core_reg_u32(): load from core reg 13  value 0x2001ffe0
Debug: 453 32574 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
Debug: 454 32576 hla_target.c:75 adapter_load_core_reg_u32(): load from core reg 14  value 0xfffffff9
Debug: 455 32576 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
Debug: 456 32578 hla_target.c:75 adapter_load_core_reg_u32(): load from core reg 15  value 0x8001c1c
Debug: 457 32578 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
Debug: 458 32580 hla_target.c:75 adapter_load_core_reg_u32(): load from core reg 16  value 0x1000003
Debug: 459 32580 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
Debug: 460 32582 hla_target.c:75 adapter_load_core_reg_u32(): load from core reg 17  value 0x2001ffe0
Debug: 461 32582 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
Debug: 462 32584 hla_target.c:75 adapter_load_core_reg_u32(): load from core reg 18  value 0x0
Debug: 463 32584 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
Debug: 464 32586 hla_target.c:140 adapter_load_core_reg_u32(): load from special reg 19 value 0x0
Debug: 465 32586 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
Debug: 466 32588 hla_target.c:140 adapter_load_core_reg_u32(): load from special reg 20 value 0x0
Debug: 467 32588 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
Debug: 468 32590 hla_target.c:140 adapter_load_core_reg_u32(): load from special reg 21 value 0x0
Debug: 469 32590 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
Debug: 470 32592 hla_target.c:140 adapter_load_core_reg_u32(): load from special reg 22 value 0x0
Debug: 471 32594 hla_target.c:447 adapter_debug_entry(): entered debug state in core mode: Handler at PC 0x08001c1c, target->state: halted
Debug: 472 32594 target.c:1397 target_call_event_callbacks(): target event 0 (gdb-halt)
Debug: 473 32594 target.c:1397 target_call_event_callbacks(): target event 1 (halted)
User : 474 32594 target.c:1770 target_arch_state(): target state: halted
User : 475 32594 armv7m.c:501 armv7m_arch_state(): target halted due to single-step, current mode: Handler HardFault
xPSR: 0x01000003 pc: 0x08001c1c msp: 0x2001ffe0
Info : 476 32594 hla_target.c:752 adapter_step(): halted: PC: 0x08001c1c

After initializing openocd, I performed a reset halt followed by a step instruction. I can't understand why PC doesn't start and remain at 0x08002080, but instead goes to 0x08001c1c, which is the location of the hard fault handler

Last edited by guihashimoto on Fri Mar 14, 2014 5:45 am, edited 1 time in total.

Re: OpenOCD 0.6.1 + gdb + Linux using STM32F4Discovery#169376

By guihashimoto - Fri Mar 14, 2014 5:42 am

- Fri Mar 14, 2014 5:42 am #169376

Also, if I do the same thing, but ask for the step from gdb, the connection will be closed and openocd says that gsb requested a non-existing register

Code: Select all

Debug: 504 19835 target.c:1397 target_call_event_callbacks(): target event 0 (gdb-halt)
Debug: 505 19836 target.c:1397 target_call_event_callbacks(): target event 1 (halted)
User : 506 19836 target.c:1770 target_arch_state(): target state: halted
User : 507 19836 armv7m.c:501 armv7m_arch_state(): target halted due to single-step, current mode: Handler HardFault
xPSR: 0x01000003 pc: 0x08001c1c msp: 0x2001ffe0
Debug: 508 19836 target.c:1397 target_call_event_callbacks(): target event 6 (gdb-end)
Info : 509 19836 hla_target.c:752 adapter_step(): halted: PC: 0x08001c1c
Debug: 510 27425 gdb_server.c:2670 gdb_input_inner(): received packet: 'qRcmd,73746570'
Debug: 511 27428 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_step
Debug: 512 27428 command.c:145 script_debug(): command - step ocd_step
Debug: 514 27430 target.c:2702 handle_step_command(): -
Debug: 515 27430 hla_target.c:703 adapter_step(): adapter_step
Debug: 516 27430 armv7m.c:127 armv7m_restore_context():  
Debug: 517 27430 target.c:2148 target_write_u32(): address: 0xe000edf8, value: 0x00000000
Debug: 518 27430 hla_target.c:780 adapter_write_memory(): adapter_write_memory 0xe000edf8 4 1
Debug: 519 27434 target.c:1397 target_call_event_callbacks(): target event 2 (resumed)
Debug: 520 27440 hla_target.c:766 adapter_read_memory(): adapter_read_memory 0xe000edf8 4 1
Debug: 521 27444 target.c:2060 target_read_u32(): address: 0xe000edf8, value: 0x00000000
Debug: 522 27444 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
Debug: 523 27446 hla_target.c:75 adapter_load_core_reg_u32(): load from core reg 0  value 0x0
Debug: 524 27446 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
Debug: 525 27447 hla_target.c:75 adapter_load_core_reg_u32(): load from core reg 1  value 0x0
Debug: 526 27448 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
Debug: 527 27449 hla_target.c:75 adapter_load_core_reg_u32(): load from core reg 2  value 0x0
Debug: 528 27450 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
Debug: 529 27451 hla_target.c:75 adapter_load_core_reg_u32(): load from core reg 3  value 0x0
Debug: 530 27452 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
Debug: 531 27453 hla_target.c:75 adapter_load_core_reg_u32(): load from core reg 4  value 0x0
Debug: 532 27454 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
Debug: 533 27456 hla_target.c:75 adapter_load_core_reg_u32(): load from core reg 5  value 0x0
Debug: 534 27456 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
Debug: 535 27457 hla_target.c:75 adapter_load_core_reg_u32(): load from core reg 6  value 0x0
Debug: 536 27458 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
Debug: 537 27459 hla_target.c:75 adapter_load_core_reg_u32(): load from core reg 7  value 0x0
Debug: 538 27460 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
Debug: 539 27461 hla_target.c:75 adapter_load_core_reg_u32(): load from core reg 8  value 0x0
Debug: 540 27461 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
Debug: 541 27464 hla_target.c:75 adapter_load_core_reg_u32(): load from core reg 9  value 0x0
Debug: 542 27464 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
Debug: 543 27465 hla_target.c:75 adapter_load_core_reg_u32(): load from core reg 10  value 0x0
Debug: 544 27465 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
Debug: 545 27467 hla_target.c:75 adapter_load_core_reg_u32(): load from core reg 11  value 0x0
Debug: 546 27467 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
Debug: 547 27469 hla_target.c:75 adapter_load_core_reg_u32(): load from core reg 12  value 0x0
Debug: 548 27469 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
Debug: 549 27471 hla_target.c:75 adapter_load_core_reg_u32(): load from core reg 13  value 0x2001ffdc
Debug: 550 27471 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
Debug: 551 27473 hla_target.c:75 adapter_load_core_reg_u32(): load from core reg 14  value 0xfffffff9
Debug: 552 27474 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
Debug: 553 27475 hla_target.c:75 adapter_load_core_reg_u32(): load from core reg 15  value 0x8001c1e
Debug: 554 27475 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
Debug: 555 27477 hla_target.c:75 adapter_load_core_reg_u32(): load from core reg 16  value 0x1000003
Debug: 556 27477 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
Debug: 557 27479 hla_target.c:75 adapter_load_core_reg_u32(): load from core reg 17  value 0x2001ffdc
Debug: 558 27479 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
Debug: 559 27481 hla_target.c:75 adapter_load_core_reg_u32(): load from core reg 18  value 0x0
Debug: 560 27481 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
Debug: 561 27484 hla_target.c:140 adapter_load_core_reg_u32(): load from special reg 19 value 0x0
Debug: 562 27484 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
Debug: 563 27485 hla_target.c:140 adapter_load_core_reg_u32(): load from special reg 20 value 0x0
Debug: 564 27485 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
Debug: 565 27487 hla_target.c:140 adapter_load_core_reg_u32(): load from special reg 21 value 0x0
Debug: 566 27487 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
Debug: 567 27489 hla_target.c:140 adapter_load_core_reg_u32(): load from special reg 22 value 0x0
Debug: 568 27492 hla_target.c:447 adapter_debug_entry(): entered debug state in core mode: Handler at PC 0x08001c1e, target->state: halted
Debug: 569 27492 target.c:1397 target_call_event_callbacks(): target event 0 (gdb-halt)
Debug: 570 27492 target.c:1397 target_call_event_callbacks(): target event 1 (halted)
User : 571 27492 target.c:1770 target_arch_state(): target state: halted
User : 572 27492 armv7m.c:501 armv7m_arch_state(): target halted due to single-step, current mode: Handler HardFault
xPSR: 0x01000003 pc: 0x08001c1e msp: 0x2001ffdc
Debug: 573 27492 target.c:1397 target_call_event_callbacks(): target event 6 (gdb-end)
Info : 574 27492 hla_target.c:752 adapter_step(): halted: PC: 0x08001c1e
Debug: 575 30889 gdb_server.c:2670 gdb_input_inner(): received packet: 'p19'
Error: 576 30889 gdb_server.c:1255 gdb_get_register_packet(): gdb requested a non-existing register
Debug: 577 30889 gdb_server.c:1012 gdb_connection_closed(): GDB Close, Target: stm32f4x.cpu, state: halted, gdb_actual_connections=0
Debug: 578 30889 target.c:1397 target_call_event_callbacks(): target event 6 (gdb-end)
Debug: 579 30889 target.c:1397 target_call_event_callbacks(): target event 24 (gdb-detach)
Info : 580 30889 server.c:476 server_loop(): dropped 'gdb' connection

Re: OpenOCD 0.6.1 + gdb + Linux using STM32F4Discovery#169377

By ntfreak - Fri Mar 14, 2014 6:02 am

- Fri Mar 14, 2014 6:02 am #169377

Well the logs look as if OpenOCD is working as expected, the Hard Fault may be caused because the target is empty ?

As for the GDB problem, where did you get it from ?
I suggest you use this toolchain for ARM - https://launchpad.net/gcc-arm-embedded

Cheers
Spen

Re: OpenOCD 0.6.1 + gdb + Linux using STM32F4Discovery#169379

By guihashimoto - Fri Mar 14, 2014 6:30 am

- Fri Mar 14, 2014 6:30 am #169379

Well, when I set the PC to the reset handler, the code runs, so I know the target is not empty.

If you step using a gdb command instead of the openocd command, or any other command from gdb really, openocd says that gdb has requested a non-existing register:

Debug: 573 27492 target.c:1397 target_call_event_callbacks(): target event 6 (gdb-end)
Info : 574 27492 hla_target.c:752 adapter_step(): halted: PC: 0x08001c1e
Debug: 575 30889 gdb_server.c:2670 gdb_input_inner(): received packet: 'p19'
Error: 576 30889 gdb_server.c:1255 gdb_get_register_packet(): gdb requested a non-existing register
Debug: 577 30889 gdb_server.c:1012 gdb_connection_closed(): GDB Close, Target: stm32f4x.cpu, state: halted, gdb_actual_connections=0

I am currently using the arm-elf-gcc toolchain

Re: OpenOCD 0.6.1 + gdb + Linux using STM32F4Discovery#169382

By ntfreak - Fri Mar 14, 2014 6:55 am

- Fri Mar 14, 2014 6:55 am #169382

guihashimoto wrote: I am currently using the arm-elf-gcc toolchain

From where ?
If it is arm-elf then it is old, thought they were all now arm-eabi

The error is caused because your gdb is requesting a non existent register.
Your GDB should request target description from OpenOCD to setup the xml register support.

Spen

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