SparkFun Forums

[iguffick]

Is there anyone working on support for the ARM926EJ-S ?

I have been thinking of having a go at adding support, but don't want to repeat work someone else has already started.

I've developed a board with a Hilscher netX 500 and I am currently using an Amontec Chameleon to debug with a 'Raven' setup.

From my first look through the PDFs, the ARM9EJ-S doesn't seem too different to the 920T. Obviously the Jazelle mode would need a jazelle-to-ARM switch on entering debug etc.

I am not completely familiar with the OpenOCD source yet.
Can anyone give me advice on the best place to start when adding support for the 9EJ-S ?

Regards,
Ian.

[Dominic]

Spencer Oliver is working on ARM966E-S support, but not ARM926EJ-S.

The differences between ARM920t and ARM926EJ-S are mostly in MMU/Cache handling.
My guess is that you wont be able to add any Jazelle support other than detecting it, and telling the user that we can't debug Jazelle. The datasheets contain zero information regarding Jazelle.

The best place to start when adding support for the ARM926EJ-S is the source, especially arm920t.c. Someone would also have to have a look at the other ARM9xxE(J)-S cores to see how many similarities exist, and if this can be combined in a single implementation.

Regards,

Dominic

[iguffick]

Dominic,
Thanks for the info and pointers.

Jazelle handling seems very similar to Thumb. On entering debug, switch from Jazelle-ARM, carry out all debug operations in ARM, then switch from ARM-Jazelle before exiting from debug.
The sequence of commands is shown in pages B20 & B22 of the ARM9EJ-S Technical Reference Manual (DDI0222B_9EJS_r1p2.pdf).

Figuring out what the program was doing in Jazelle is quite another matter!
Adding Jazelle handling is just completing the debug support.
In reality, for most people the core will never be in the Jazelle state - AFAIK GCC cannot generate Jazelle code?

Regards,
Ian