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Questions about the BatchPCB service

Moderator: robacarp

By jfallin
#8143
Where can I find all the design rules I need to follow to use this deal? I see emails referring to the 8 mil width & spacing rules, but what about via rules, etc?

John
By MotoDog
#8153
Me Too!

I am also looking for a complete list of rules for your design service so I can check my design before submitting it?

Thanks,
Mike
By pittuck
#8178
as this is a frequently asked question, go to the batchpcb.com website and click on the FAQ link on the left.

The second entry down is what you need.
By Coriolis
#8268
There used to be a step by step tutorial for Eagle users on the old site (sparkfun) including a cam file and scripts, but the link to the tutorial is now gone since the redirection occured.

I have the files, but did not save the tutorial. Can you provide a link in the FAQ back to the tutorial, or reincorporate it in the new site?
By Coriolis
#8270
Haha found the link in a thread further down, and I rip the noobs for not reading before posting in my neck of the internet. Here is the link for those interested: http://www.sparkfun.com/tutorial/PCB/ea ... torial.htm

I still think it should be referenced in the FAQ though.
By NleahciM
#8292
Coriolis wrote:Haha found the link in a thread further down, and I rip the noobs for not reading before posting in my neck of the internet. Here is the link for those interested: http://www.sparkfun.com/tutorial/PCB/ea ... torial.htm

I still think it should be referenced in the FAQ though.
I just followed this guide to the word and submitted a board - it still (like last time) came out as 5 in^2, while it's actually 3. Has anybody successfully submitted a board made in Eagle? ARGH.
By Philba
#8307
successfully submitted (but not ordered) like 6 and got correct sizes. all done in eagle.

take a look at your gerbers in a gerber viewer. I bet you've got something sticking out on the silk screen or your drill file is wrong.

You might also want to make sure you have eagle 4.15. versions before 4.11 did wierd things with drill files.
By NleahciM
#8310
Philba wrote:successfully submitted (but not ordered) like 6 and got correct sizes. all done in eagle.

take a look at your gerbers in a gerber viewer. I bet you've got something sticking out on the silk screen or your drill file is wrong.

You might also want to make sure you have eagle 4.15. versions before 4.11 did wierd things with drill files.
Done in Eagle 4.15. I've got excess silkscreen stuff hanging past the border of the board. (connectors and some part names and values that I didn't want to use) Please tell me the SFE program doesn't use the silkscreen to figure out the size of the board - that would be possibly the most silly thing I'd ever heard of.
By GeekHollow
#8311
They use all files and then use the max x and y reported. What else could an automated script use? They originally tried just using the trace files, but were having too many problems with undersizing.

That said, if you run silk-gen.ulp on the board, all the non-text entities become individual lines. It only took me a few minutes to edit any that extended past the boarders out of existence. Text is no longer bound to the part as well, so easy to edit out. Or just smash the part and move or delete even sooner.

I also modified the .cam file to export the dimension layer to the top silkscreen file. Everything came back just fine, board was ordered, and just shipped. I expect it here in a day or so.

And for the record, I'm using Eagle 4.14.

Jerry
By NleahciM
#8313
GeekHollow wrote:They use all files and then use the max x and y reported. What else could an automated script use? They originally tried just using the trace files, but were having too many problems with undersizing.

That said, if you run silk-gen.ulp on the board, all the non-text entities become individual lines. It only took me a few minutes to edit any that extended past the boarders out of existence. Text is no longer bound to the part as well, so easy to edit out. Or just smash the part and move or delete even sooner.

I also modified the .cam file to export the dimension layer to the top silkscreen file. Everything came back just fine, board was ordered, and just shipped. I expect it here in a day or so.

And for the record, I'm using Eagle 4.14.

Jerry
Why not just use the board border? Maybe that doesn't show up in the cam files or something? Problem is both with text and non-text - Eagle will only let you delete value or name texts for a single component - if you try to delete both, it brings both back to life. (I've always viewed this as a bug - but it's been like that since I started using Eagle a couple three years ago)

And so you're saying I have to go in and edit the actual connector silkscreen?

There has GOT to be a better way to do this - this is nonsense.
By GeekHollow
#8319
Why not just use the board border? Maybe that doesn't show up in the cam files or something?
Exactly. The problem is, just what is the border? In eagle, it's intended to be the dimension layer, but it's use is entirely optional. I make sure I've got it defined as I want, and then make certain it's included in a silkscreen layer during the cam export.
Problem is both with text and non-text - Eagle will only let you delete value or name texts for a single component - if you try to delete both, it brings both back to life. (I've always viewed this as a bug - but it's been like that since I started using Eagle a couple three years ago)
Ok, you have me there. I've never tried to delete both. I usually just turn off the values layer entirely. Then if I delete a name (usually for connecters since I'm putting more meaningful text on there) neither appear.
And so you're saying I have to go in and edit the actual connector silkscreen?
Nonononono! I agree, that would be waaaay too ugly. And it's what I thought at first. What I do, is get the board as ready as possible for export. I then run the silk_gen.ulp. This copies all silkscreen elements (the xPlace, xNames, and xValues layers - selectable at run time) to new layers (_tsilk and _bsilk), modifying them to meet minimum width requirements in the process. All of these items are now new entities that are independent of the original silkscreen layers. Your original silkscreen layers are left unmutilated, so if you want to make more changes, just change which layers are on, do your edits, and re-run the .ulp.

The entities on _tsilk and _bsilk are easily editable. So after running silk_gen, but before I run cam, I edit those so there is nothing outside of the dimension lines.
There has GOT to be a better way to do this - this is nonsense.
Well, it's not as bad as you were thinking, but it could still use some improvement. The problem, as I understand it, is that there is no way to export a gerber keepout layer. What eagle defines as a keepout layer is solely to help the autorouter and drc. And somebody please correct me if I'm off on this.

One thing that Nathan (or somebody) needs to do is restore the original eagle tutorial to the batchpcb site, and hopefully update it so that it reflects the current needs or techniques.

Jerry
By NleahciM
#8320
GeekHollow wrote:
Why not just use the board border? Maybe that doesn't show up in the cam files or something?
Exactly. The problem is, just what is the border? In eagle, it's intended to be the dimension layer, but it's use is entirely optional. I make sure I've got it defined as I want, and then make certain it's included in a silkscreen layer during the cam export.
Problem is both with text and non-text - Eagle will only let you delete value or name texts for a single component - if you try to delete both, it brings both back to life. (I've always viewed this as a bug - but it's been like that since I started using Eagle a couple three years ago)
Ok, you have me there. I've never tried to delete both. I usually just turn off the values layer entirely. Then if I delete a name (usually for connecters since I'm putting more meaningful text on there) neither appear.
And so you're saying I have to go in and edit the actual connector silkscreen?
Nonononono! I agree, that would be waaaay too ugly. And it's what I thought at first. What I do, is get the board as ready as possible for export. I then run the silk_gen.ulp. This copies all silkscreen elements (the xPlace, xNames, and xValues layers - selectable at run time) to new layers (_tsilk and _bsilk), modifying them to meet minimum width requirements in the process. All of these items are now new entities that are independent of the original silkscreen layers. Your original silkscreen layers are left unmutilated, so if you want to make more changes, just change which layers are on, do your edits, and re-run the .ulp.

The entities on _tsilk and _bsilk are easily editable. So after running silk_gen, but before I run cam, I edit those so there is nothing outside of the dimension lines.
There has GOT to be a better way to do this - this is nonsense.
Well, it's not as bad as you were thinking, but it could still use some improvement. The problem, as I understand it, is that there is no way to export a gerber keepout layer. What eagle defines as a keepout layer is solely to help the autorouter and drc. And somebody please correct me if I'm off on this.

One thing that Nathan (or somebody) needs to do is restore the original eagle tutorial to the batchpcb site, and hopefully update it so that it reflects the current needs or techniques.

Jerry
OK that makes more sense then. It'll still be quite the pain to do every time though.

I just noticed I got an e-mail back from batchpcb and apparently my board doesn't pass their 8mil check, even though it passes Eagle's. Who am I to trust? Eagle - who has been around for years, or SFE who just wrote this software. hmmmmmm...

The highlighted parts were around non square ground pours. If somebody at SFE wants to see the files I can send them to you. I really would appreciate it if you all could fix that bug.
By Philba
#8322
first off, if you read the postings here, you will find that ground pours are known to be an issue. use isolate to increase the distance. All mine have at least 16mil isolation (and pass).

yes, there should be a border gerber you submit with the rest of the order. I have made this point several times. For what ever reason, nathan has not gone that direction. If you draw the border in the top silk layer (and keep it 8mil...) you will have a very unambiguous statement as to board size.

Now, having stuff on the silk screen outside the border isn't a good idea anyway. Some one will have to go in and take care of it. The last thing you want a board house doing is making arbitrary changes to your design. I've changed all my library parts to have the pieces that stick beyond the border be in the tdoc layer and stuff inside the border be in the tplace layer. when silk gen runs, it comes out perfect. very clean. now if we could get some one to hack silk_gen to copy the border onto the silkscreen automatically it would be all good.
By NleahciM
#8323
Philba wrote:first off, if you read the postings here, you will find that ground pours are known to be an issue. use isolate to increase the distance. All mine have at least 16mil isolation (and pass).

yes, there should be a border gerber you submit with the rest of the order. I have made this point several times. For what ever reason, nathan has not gone that direction. If you draw the border in the top silk layer (and keep it 8mil...) you will have a very unambiguous statement as to board size.

Now, having stuff on the silk screen outside the border isn't a good idea anyway. Some one will have to go in and take care of it. The last thing you want a board house doing is making arbitrary changes to your design. I've changed all my library parts to have the pieces that stick beyond the border be in the tdoc layer and stuff inside the border be in the tplace layer. when silk gen runs, it comes out perfect. very clean. now if we could get some one to hack silk_gen to copy the border onto the silkscreen automatically it would be all good.
The fact of the matter about the ground poor is that it's a bug. I don't want to have to change my layouts just because of some silly bug. For one thing - many of my layouts are tight enough that a 16mil pour just won't work.
By pittuck
#8331
well, the bug is not our developed software, its to do with a piece of software that had been out for 3 or 4 years.

So there is nothing we can do, either accept the bug and warn people, or not use that software and close batchpcb...

Hopefully later updates of the software will fix the problem, but we cant say for sure when or even if it will get fixed.