SparkFun Forums

[brennen]

I'm working on a project right now and I have an nRF24L01 and a 74hc165 parallel-to-serial shift register hooked up on my SPI bus. From the looks of the datasheet, the 165 doesn't go into high impedance on its output when the chip is disabled. With that said, should I put a tri-state buffer between the 74hc165 and the SPI MISO pin so that, when disabled, the 165 will look like high impedance to my SPI port?

As an FYI, I have both of the chips working correctly separately, but I haven't tried them simultaneously yet.

[oPossum]

Yes, you need to isolate the 165 somehow when it is not enabled. A tristate gate or N-to-1 mux (74HC4051,52,53) are common ways to do this.
Another way is to put a resistor between the 165 and the SPI bus. Typically 1k to 10k depending on SPI clock rate and bus capacitance. This only works for one device on the SPI bus, all others must have a proper tristate output that can overcome this resistance.