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By Jay Kominek
#13011
To convince myself I could 1) design a PCB 2) assemble it and 3) have it actually work, I made up a little Altera CPLD breakout board, and ran it through BatchPCB. The PCBs showed up over the weekend, the parts from digikey on monday, and today I sat down and soldered it.
Image

Soldering on the 44 pin TQFP was about fifty bazillion times easier than the 0603 caps. Next time I'll use bigger caps. At least I went for unpolarized caps.

So, my problem: I programmed it with just a XOR gate, and it seems to work, except logic high is about 3.3V, not 5V. This is with an EPM7064STC44-10, which should be 5V only. (Their CPLDs in larger packages have VCCIO pins for doing 3.3V logic, but not this one.) Anyone have any ideas what could be going on?

(Oh, lesson learned: move silk screened text away from parts that will cover it up.)
By MGP
#13015
What does the datasheet guarantee for output voltage levels?

I've seen lots of CPLDs running at 5V that only have a TTL-like output voltage level, i.e. ~3.5V rather than the CMOS output level you're expecting. I bet if you look up the minimum output voltage (logic high) specification it will say something like "VCC-1.5V" or similar.
By Jay Kominek
#13016
Hm, the sheet quotes a min logic high voltage of 2.4V. I went and looked again (your mention of "~3.5V" made me think), turns out it is cranking out 3.45V. This seems terribly sneaky of them, but at least it means nothing is exploded.

Thanks.
By MGP
#13036
Yeah, it is kind of sneaky. It bit me many years ago when I switched to a "new" CMOS GAL device and expected the output voltage levels to be very close to 5V since I wasn't loading them much (inputs to other 5V CMOS logic).

I was surprised like you were when I only measured about 3.5V on the outputs. Reading the datasheet left me disappointed as well...

So now I make sure to read every datasheet for guaranteed output voltage levels and conditions with every new device I use.