- Sat May 08, 2010 12:14 pm
#100447
Hi everyone,
I'm trying to interface the PSP LCD with a Virtex 4 evaluation board (I'm attempting to make a pseudo navigation system for a digital design class I'm taking), and, well, unfortunately, it's not working (I haven't worked with graphics LCDs before, so I'm a bit lost...).
First, I was wondering if I should be able to detect anything when I don't have the backlight powered (that might be a reason?). I've simulated the Hsync/Vsync signals, and the readings from a logic analyzer seem to be correct (on that note, I just wanted to check, but is Vsync supposed to go low on the falling edge of Hsync or on the rising edge? I might've missed it, but the datasheet wasn't too clear on that). I'm currently just trying to display a blank white screen.
I don't have any means to step up 5V to 20 or whatever V currently, but I could somehow connect the backlight power to a voltage supply... if that is the issue.
Also, why is it necessary to sequence the power supply such that AVDD turns on after VCC? Should not having such a sequence prevent the LCD from turning on? And would a makeshift solution be to just to connect the AVDD manually after the board has been turned on?
And finally, if I'm not sure that my actual LCD is working, is there any way to test that? I got the LCD from some Amazon seller when they were out of stock on Sparkfun.
I have also been trying to implement an SPI controller in the FPGA. I can read the ADXL345 device ID without any issues, and, for the most part, I am at least able to get values when I run self test. However, when I switch to normal operation, I don't seem to ever be getting a data ready interrupt.
I had my registers set as follows (and I'm wondering if anything I'm doing is inappropriate or if I need to set additional registers...):
constant DataFormatSetup : STD_LOGIC_VECTOR (0 to 15) := -X"3120";
-- 0x31 : Data Format Register (set to 0x20)
-- Bit 7 cleared : self-test force disabled
-- Bit 6 cleared : 4-wire SPI mode
-- Bit 5 set : Active low interrupt
-- 0
-- Bit 3 cleared: 10-bit mode
-- Bit 2 cleared: right justified mode with sign extension
-- Bits 1 and 0 cleared: +/- 2g range
constant InterruptEnableSetup : STD_LOGIC_VECTOR (0 to 15) := X"2E80";
-- 0x2E : Interrupt Enable (0x80)
-- Bit 7 set : enables Data Ready interrupt (Note on pin INT1)
constant DataRateSetup : STD_LOGIC_VECTOR (0 to 15) := X"2C0F";
-- 0x2C : Data Rate and Power Mode Control
-- Low Byte set to F: Output Data Rate of 3200 Hz
constant PowerControlSetup : STD_LOGIC_VECTOR (0 to 15) := X"2D08";
-- 0x2D : Power Control
-- Bit 3 set : Measurement Mode
constant DataReadRegisterStart : STD_LOGIC_VECTOR (0 to 15) := X"3200";
-- 0x32 : DataX0 register
Sorry for the trouble! ._.;
I'm trying to interface the PSP LCD with a Virtex 4 evaluation board (I'm attempting to make a pseudo navigation system for a digital design class I'm taking), and, well, unfortunately, it's not working (I haven't worked with graphics LCDs before, so I'm a bit lost...).
First, I was wondering if I should be able to detect anything when I don't have the backlight powered (that might be a reason?). I've simulated the Hsync/Vsync signals, and the readings from a logic analyzer seem to be correct (on that note, I just wanted to check, but is Vsync supposed to go low on the falling edge of Hsync or on the rising edge? I might've missed it, but the datasheet wasn't too clear on that). I'm currently just trying to display a blank white screen.
I don't have any means to step up 5V to 20 or whatever V currently, but I could somehow connect the backlight power to a voltage supply... if that is the issue.
Also, why is it necessary to sequence the power supply such that AVDD turns on after VCC? Should not having such a sequence prevent the LCD from turning on? And would a makeshift solution be to just to connect the AVDD manually after the board has been turned on?
And finally, if I'm not sure that my actual LCD is working, is there any way to test that? I got the LCD from some Amazon seller when they were out of stock on Sparkfun.
I have also been trying to implement an SPI controller in the FPGA. I can read the ADXL345 device ID without any issues, and, for the most part, I am at least able to get values when I run self test. However, when I switch to normal operation, I don't seem to ever be getting a data ready interrupt.
I had my registers set as follows (and I'm wondering if anything I'm doing is inappropriate or if I need to set additional registers...):
constant DataFormatSetup : STD_LOGIC_VECTOR (0 to 15) := -X"3120";
-- 0x31 : Data Format Register (set to 0x20)
-- Bit 7 cleared : self-test force disabled
-- Bit 6 cleared : 4-wire SPI mode
-- Bit 5 set : Active low interrupt
-- 0
-- Bit 3 cleared: 10-bit mode
-- Bit 2 cleared: right justified mode with sign extension
-- Bits 1 and 0 cleared: +/- 2g range
constant InterruptEnableSetup : STD_LOGIC_VECTOR (0 to 15) := X"2E80";
-- 0x2E : Interrupt Enable (0x80)
-- Bit 7 set : enables Data Ready interrupt (Note on pin INT1)
constant DataRateSetup : STD_LOGIC_VECTOR (0 to 15) := X"2C0F";
-- 0x2C : Data Rate and Power Mode Control
-- Low Byte set to F: Output Data Rate of 3200 Hz
constant PowerControlSetup : STD_LOGIC_VECTOR (0 to 15) := X"2D08";
-- 0x2D : Power Control
-- Bit 3 set : Measurement Mode
constant DataReadRegisterStart : STD_LOGIC_VECTOR (0 to 15) := X"3200";
-- 0x32 : DataX0 register
Sorry for the trouble! ._.;