There is an appnote from NVLSI - "Interfacing nRF2401 with SPI" - showing how to use two resistors from the MISO / MOSI lines to the Data line --
http://www.nvlsi.no/index_popup.cfm?obj ... 4&prop=354
It would seem possible to thus take advantage of the AVR's hardware SPI to do all the bit shifting, freeing the processor for other tasks.
Though with the timing specs listed in the datasheet, I don't think that it would be possible to send the data quicker than 1mhz to the internal FIFO - as I was originally thinking that you could use the AVR SPI at 4 or 8 mhz and fill up the transmit buffer quickly, if need be.
Could the second channel's Clk2 and Dout2 be connected to the same SPI bus as well, or does it need to be separate?
By bit banging all the lines, is it possible to receive data on the two channels at the full 1mbps rate?