In the case of the Programmable Interval Timer Controller, when I get an interrupt I can determine if it was one of the interrupt sources by reading the status register and looking at the PITS bit. This seems to work fine.
But the DBGU peripheral is driving me nuts. To set the stage for my question:
I am using the DBGU in conjunction with PDC (DMA). Just to keep things simple as I develop the driver, I am only transmitting from the UART and only using the single DMA not the chained ("Next") capability. To simply things even more, my foreground only sends out a few bytes every second at 115,200 baud. This prevents any possibility that my foreground task may step on the DMA buffers before they are done. If I do not enable any interrupts, my transmissions work fine. Hence the basic configuration of the UART works (baud, ...) and my ability to set PDC pointers and count registers must be ok as well.
So the next step was to enable the DBGU_PTCR.TXTEN bit. Now as long as the PITC is turned of, I get a very nice interrupt at the conclusion of the DMA. I can even use that opportunity to reload the DMA buffers and send out another block of data.
But now, I try to have the PITC and the DBGU coexist on the System Interrupt. The PITC is set to go off 64 times a second. It expires and generates an interrupt well before I even think about sending out a string over the DBGU. So the System Interrupt ISR gets called, and I look to see if the PITC was responsibe by looking at PIT_SR.PITS. It is responsible, so I increment a variable and read PIT_PIVR to clear it.
Now I need to look at the DBGU to see if it happened to generate an interrupt at the same time. And this is where I fall flat on my face.
I can't use the DBGU_SR.ENDTX bit as an indication as it only reports state not edges. If I never enable the TXTEN interrupt or start a DMA, it still reports the DMA as being inactive.
I can't use the DBGU_PTSR.TXTEN bit as this simply indicates that the PDC is enabled that that it caused the interrupt.
So what is the magic sauce? What combination of register reads can one use to know if the DBGU was the reason for generating a PDC/DMA based interrupt.