- Sun Apr 28, 2013 8:47 am
#158944
After a lengthy haitus where I mostly played with ST parts, I'm working with an LPC1768. And I'm really struggling with the bootloader when re-flashing.
* LPC1768FBD100
* bargain(?) (sub-)basement dev board
* 20 pin JTAG (not SWD), tRST and sRST separate
* Olimex ARM-USB-OCD
* openOCD 0.6.1
* telnet interface
* host is i686, Linux 3.8.5 (don't think this is important..)
After hours of experimentation, I've temporarily adopted the following flash sequence:
* reset_config trst_and_srst (configure reset to drive both tRST and sRST)
* halt
* [flash vector table is now at address 0]
* erase** appropriate sectors
* reset halt
* [ROM vector table is now at address 0]
* flash write_image unlock path-to-hex 0 ihex (flash image)
* reset
I'm curious whether anyone has a less cumbersome procedure, especially with openOCD. Maybe this should be in the openOCD forum, but I thought some of the Crossworks or IAR users might have insight on the LPC1768 flashing process. I don't try to provide any log files etc.at this point because my efforts so far have been too random to be useful. I don't-know-anything-about / didn't-check how openOCD actually implements a command such as flash write_image erase unlock.
**various / repeated attempts to erase and write prior to the first reset will erase, but not write the new code (I did manage to write garbage in sector 0 by playing with the MEMMAP register @ 0x400fc040).
* LPC1768FBD100
* bargain(?) (sub-)basement dev board
* 20 pin JTAG (not SWD), tRST and sRST separate
* Olimex ARM-USB-OCD
* openOCD 0.6.1
* telnet interface
* host is i686, Linux 3.8.5 (don't think this is important..)
After hours of experimentation, I've temporarily adopted the following flash sequence:
* reset_config trst_and_srst (configure reset to drive both tRST and sRST)
* halt
* [flash vector table is now at address 0]
* erase** appropriate sectors
* reset halt
* [ROM vector table is now at address 0]
* flash write_image unlock path-to-hex 0 ihex (flash image)
* reset
I'm curious whether anyone has a less cumbersome procedure, especially with openOCD. Maybe this should be in the openOCD forum, but I thought some of the Crossworks or IAR users might have insight on the LPC1768 flashing process. I don't try to provide any log files etc.at this point because my efforts so far have been too random to be useful. I don't-know-anything-about / didn't-check how openOCD actually implements a command such as flash write_image erase unlock.
**various / repeated attempts to erase and write prior to the first reset will erase, but not write the new code (I did manage to write garbage in sector 0 by playing with the MEMMAP register @ 0x400fc040).