SparkFun Forums

[seulater]

So whos the FPGA guru over there at spark fun who whipped that up to drive the Color PSP 480x272 4.3 LCD ?

I was going to do it with a graphics controller, i know nothing about programming FPGA's but maybe its something i should look into if it can drive that LCD and act like a graphics controller.

Is that guru willing to share the any tips or information on how to do this ourselves ?

[busonerd]

Hi,

We'll be posting all the source as to how we did it. We just need to clean up the code first. [Your guru is just a mere verilog hacker, and writes ugly code]. We also need to actually make the included testbenches relevant to the current code state.

The following is just a basic overview of how its all connected together, in case anyone wants to write their own:

Code: Select all

--------------             ----------------
|20 mhz clock|------------>|DCM           |
--------------             |CLKFX Mul 9   |
     |                     |      Div 20  |
    \ /                     ----------------
--------------------              |
| 2 Stage pipeline |             \ /
| pattern generator|       -------------------
|                  |       |  LCD timing gen |
|  X/Y addr gen    |       -------------------
|                  |             \ /
|  1 bit pixel lut |       -------------------
|        or        |       | LCD output sync |
|  4 bpp lut       |<------| status sig gen  |---- pixel ----->[LCD]
|        or        |       -------------------
|  pattern gen     |                ^
--------------------       -------------------
       |                   | Async fifo      |
       |                   -------------------
       |                            |
       \-----------pixel data-------/

Hopefully we'll have a big verilog source tarball up at some point. It requires Xilinx synthesis tools to be installed on linux, all makefile driven flow, not ISE.

If you want to build / change it on windows, you'll probably have to make an ISE project with the various files we have, but we've given up on the ISE flow.

Cheers,

--David Carne

[MaxAmp]

Which Xilinx Spartan did you use (hard to tell from the pictures)?

[busonerd]

Spartan 3E 250K gate - but its only at 10% logic utilization [not counting the brams].

Cheers,

-- David Carne

[nullbert]

Thanks for doing the legwork on the PSP display! Fantastic!

Can anyone recommend a low cost FPGA dev board ?

I too was thinking of the Spartan 3E - I like the Digilent's BASYS board- the price is great, but it focuses too much on the included peripherals - I really need I/O for projects like driving LCDs.

Which board is used in the PSP demo LCD? I can't make out the logo.

Thanks again,
Brent

[nullbert]

....waaait..

Is this a new FPGA development board coming out from Spark Fun?

[chrisjp]

I remember them mentioning a dev board coming out in the next few months will all pins broken out Thought they said a Spartan 500E though, but looks good.

As far as low(er) cost dev boards, I Love my spartan 3e starter kit. 40 IO pins on a nice hirose header. You can get a breadboard compatible with it from digilent or design compatible boards (7$ connector for q1 on digikey) with batch pcb and plug it right in!

Has nice onboard usb so no need to mess with parallel ports etc.

Anyways, check it out until sparkfun comes out with something cheaper

[mikewitt]

I was wondering, what is the connector for the backlight? I'm wondering because I _NEED_ one; while replacing the screen on my PSP, I broke the backlight connector (the little black piece that pushes the pins down) and couldn't find the backlight connector anywhere. Whatever it is, will sparkfun be offering it any time soon, and if so, when?

Much Appreciated,
Mike

[sk_uk]

Any more news on this project?

[justmatt83]

Any News.

[busonerd]

Regarding the FPGA board - we're waiting on some parts for production.

Specs for all those that care:

Code: Select all

   S3E 500K gate FPGA -4 Speed grade, PQ208 Package [we can't find any of the -5's to use]

   AT45DB161 spi dataflash used as config prom.

   JTAG connections for standard digilent programmer + our programmer pinout [we have a different pinout for better signal integrity over longer cable runs].

   Onboard LDO power supplies for each rail. Jumpers to connect onboard power reg /w respective power rail + jumper to connect 3.3V power rail to VCCO for each bank. [Otherwise just use one of our handy female-female jumper wires for VCCO power].

   Jumpers to attach / detach max3232 uart /w flow control to pins we chose.

   50mhz oscillator [hardwired to fpga]

   Jumpers to set config mode.
   
   Theres probably more, but I can't remember right now.

   Every pin broken out! If you shear the board at the connection line where the board is slotted, you effectively end up with a breakout!. [Note, each VCCO bank voltage pin is tied within the same bank, and HSWAP is tied to ground, but other than that, its a pure breakout].

 

Regarding the PSP LCD adapter - well, now we've gotta modify that so the touchscreen attaches as well before we ship .

Cheers,

--David Carne

[seulater]

I see in the data sheets that the typ. power is 2.5v . what did you guys drive the panel with ?

[busonerd]

We used:

2.5vreg + 2.5v IO [just connected BANK3 to 2.5V].
5v avcc
backlight: current controlled SMPS boost @ 18ma.

Cheers,

--David Carne

[seulater]

thanks, i will try to run it @ the absolute max of 3.3v which is what my ARM is at.

[seulater]

Does anyone know of a graphics controller that will drive this panel ?
i would like to connect it to my ARM processor.