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By HansDR
#93819
I bought a Nokia 6100 LCD + breakout board recently (Feb 2010), and the only thing that is working so far is the backlight. I've tried sending it variations of commands from LCD drivers all over the internet, from the examples here, to James Lynch's tutorial code, and none of it works. There is no indication from the LCD panel that it is receiving any commands.

At first I thought that I might be setting up the SPI port incorrectly, or have something hooked up wrong (I don't have an oscilloscope or logic analyser to check things with), but I've double checked everything multiple times. Then I noticed that I'm not the only one with this problem; see the comments for the Nokia LCD product entry (scroll down to a comment by
ahambone, Jan 17, 2010): http://www.sparkfun.com/commerce/produc ... cts_id=569

This suggests that recent LCD panels are different from previous ones in some way, or they might be defective.

Hans anyone managed to get a recent Nokia knockoff LCD panel working? If so, what did you do?

Any other suggestions would be welcome.

Hans

EDIT: Not that it should make a difference, but I'm using it with an Olimex Sam7S256 dev. board.
By HansDR
#94028
No-one here has tried to use a recent Nokia LCD module (Jan to Feb 2010 or thereabouts)?

Hans
By HansDR
#95052
Okay, I bought a USBee SX logic analyzer module so that I could have a look at the SPI signals being sent to the LCD screen, and the problem was that the Chip-Select (CS) line wasn't being deasserted between 9-bit transfers. The EPSON controller needs this to happen for some reason. I added a delay loop to the send algorithm, and the LCD responded as it should.

This now brings me to the next problem. The SAM7's SPI hardware doesn't deassert CS, even if the LASTXFER bit is set or CSAAT is cleared. According to the documentation: "The current NPCS will be deasserted after the character written in TD has been transferred." Unfortunately, writing a new value to the transmit register will stop this from happening. Does anyone know a method of forcing the NPCS to be cleared between individual transfers? I was hoping to use DMA for transfers, which isn't possible with an ugly delay loop.

Hans
By HansDR
#95074
Wrong again. The problem was bad 3.3V and ground supply resulting in data corruption. Hence, the need for CS to be deasserted every time so that it syncs up. With a stable supply and ground, it works properly without CS being deasserted for every sent byte. That eliminates the other issue that I had.

Hans